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DM9161 Datasheet(PDF) 30 Page - List of Unclassifed Manufacturers |
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DM9161 Datasheet(HTML) 30 Page - List of Unclassifed Manufacturers |
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30 / 47 page ![]() DM9161 10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver 30 Final Version: DM9161-DS-F02 May 10,2002 8.10 10BASE-T Configuration/Status (10BTCSR) - 18 Bit Bit Name Default Description 18.15 Reserved 0, RO Reserved Read as 0, ignore on write 18.14 LP_EN 1, RW Link Pulse Enable 1 = Transmission of link pulses enabled 0 = Link pulses disabled, good link condition forced This bit is valid only in 10Mbps operation 18.13 HBE 1,RW Heartbeat Enable 1 = Heartbeat function enabled 0 = Heartbeat function disabled When the DM9161 is configured for full duplex operation, this bit will be ignored (the collision/heartbeat function is invalid in full duplex mode) 18.12 SQUELCH 1, RW Squelch Enable 1 = Normal squelch 0 = Low squelch 18.11 JABEN 1, RW Jabber Enable Enables or disables the Jabber function when the DM9161 is in 10BASE-T full duplex or 10BASE-T transceiver loopback mode 1 = Jabber function enabled 0 = Jabber function disabled 18.10 10BT_SER 0,RW 10BASE-T GPSI Mode 1 = 10BASE-T GPSI mode selected 0 = 10BASE-T MII mode selected GPSI mode is not supported for 100Mbps operation 18.9-18.1 Reserved 0, RO Reserved Read as 0, ignore on write 18.0 POLR 0, RO Polarity Reversed When this bit is set to 1, it indicates that the 10Mbps cable polarity is reversed. This bit is automatically set and cleared by 10BASE-T module 8.11 DAVICOM Specified Interrupt Register – 21 Bit Bit Name Default Description 21.15 INTR PEND 0, RO Interrupt Pending Indicates that the interrupt is pending and is cleared by the current read. This bit shows the same result as bit 0. (INTR Status) 21.14- 21.12 Reserved 0, RO Reserved 21.11 FDX mask 1, RW Full-duplex Interrupt Mask When this bit is set, the Duplex status change will not generate the interrupt 21.10 SPD mask 1, RW Speed Interrupt Mask When this bit is set, the Speed status change will not generate the interrupt 21.9 LINK mask 1, RW Link Interrupt Mask |
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