LAN9211 datasheet(82/147 Pages) SMSC

Part #	LAN9211

Description	High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support

PDF	147 Pages

Scroll/Zoom	100%

Manufacturer	SMSC [SMSC Corporation]

Direct Link	http://www.smsc.com

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82 / 147 page

High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support

Datasheet

Revision 2.9 (03-01-12)

SMSC LAN9211

DATASHEET

12:11

Reserved

TX Data FIFO Overrun Interrupt (TDFO). Generated when the TX data

FIFO is full, and another write is attempted.

R/WC

TX Data FIFO Available Interrupt (TDFA). Generated when the TX data

FIFO available space is greater than the programmed level.

R/WC

TX Status FIFO Full Interrupt (TSFF). Generated when the TX Status

FIFO is full.

R/WC

TX Status FIFO Level Interrupt (TSFL). Generated when the TX Status

FIFO reaches the programmed level.

R/WC

RX Dropped Frame Interrupt (RXDF_INT). This interrupt is issued

whenever a receive frame is dropped.

R/WC

Reserved

RX Status FIFO Full Interrupt (RSFF). Generated when the RX Status

FIFO is full.

R/WC

RX Status FIFO Level Interrupt (RSFL). Generated when the RX Status

FIFO reaches the programmed level.

R/WC

2-0

GPIO [2:0] (GPIOx_INT). Interrupts are generated from the GPIO’s.

These interrupts are configured through the GPIO_CFG register.

R/WC

000

BITS

DESCRIPTION

TYPE

DEFAULT

LAN9211 Datasheet(PDF) 82 Page - SMSC Corporation