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LAN89730 Datasheet(PDF) 205 Page - Microchip Technology |
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LAN89730 Datasheet(HTML) 205 Page - Microchip Technology |
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205 / 218 page  2013-2015 Microchip Technology Inc. DS60001348A-page 205 LAN89730 7.6.7 JTAG TIMING This section specifies the JTAG timing of the device. FIGURE 7-8: JTAG TIMING TABLE 7-21: JTAG TIMING VALUES Symbol Description Min Max Units Notes ttckp TCK clock period 66.67 ns ttckhl TCK clock high/low time ttckp*0.4 ttckp*0.6 ns tsu TDI, TMS setup to TCK rising edge 10 ns th TDI, TMS hold from TCK rising edge 10 ns tdov TDO output valid from TCK falling edge 16 ns tdoinvld TDO output invalid from TCK falling edge 0 ns TCK (Input) TDI, TMS (Inputs) ttckhl ttckp ttckhl tsu th tdov TDO (Output) tdoinvld |
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