DS1852 datasheet(14/25 Pages) DALLAS

14 / 25 page

DS1852

14 of 25

Table 00h-FFh (Lower)

Address

Byte 0

Byte 1

Byte 2

Byte 3

Byte 4

Byte 5

Byte 6

Byte 7

bits<7-0>

00h

…

58h

IEEE Data EEPROM

(Read Access – All, Write Access – Level 2)

60h

Temp MSB

Temp LSB

Vcc MSB

Vcc LSB

Bin MSB

Bin LSB

Pin MSB

Pin LSB

68h

Rin MSB

Rin LSB

reserved

I/O states

AD updated

70h

Alarm flag3

alarm flag2

alarm flag1

alarm flag0

warn flag3

warn flag2

warn flag1

warn flag0

78h

Reserved

reserved

PWE Byte 3

PWE Byte 2

PWE Byte 1

PWE Byte 0

table select

Bytes 60h through 7Fh are RAM, see expanded table for access requirements.

Table 00h-FFh (Lower) Expanded

Byte Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

I/O states (1)

Din

reserved

RSin

reserved

Fin

Lin

power-on logic

AD updated

(2)

T-updated

V-updated

B-updated

P-updated

R-updated

reserved

alarm flag3 (3)

T-ad hi

T-ad lo

V-ad hi

V-ad lo

B-ad hi

B-ad lo

P-ad hi

P-ad lo

alarm flag2 (3)

R-ad hi

R-ad lo

reserved

alarm flag1 (3)

reserved

B-ft hi

reserved

P-ft hi

reserved

alarm flag0 (3)

R-ft hi

reserved

warn flag3 (3)

T-ad hi

T-ad lo

V-ad hi

V-ad lo

B-ad hi

B-ad lo

P-ad hi

P-ad lo

warn flag2 (3)

R-ad hi

R-ad lo

reserved

warn flag1 (3)

reserved

warn flag0 (3)

reserved

(1)

Read Access – All, Write Access – None

(2)

Read Access – All, Write Access – All (The DS1852 will also write to this byte)

(3)

Read Access – All, Write Access – Level 2 + config bit (Table 03h, E8h)

DS1852 Datasheet(PDF) 14 Page - Dallas Semiconductor

DS1852 Datasheet(HTML) 14 Page - Dallas Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25

Datasheet Download

Link URL