Si511 datasheet(24/26 Pages) SILABS

24 / 26 page

Si510/511

Rev. 1.2

DOCUMENT CHANGE LIST

Revision 0.9 to Revision 1.0



Updated Table 1 on page 4.



Updates to supply current typical and maximum values

for CMOS, LVDS, LVPECL and HCSL.



CMOS frequency test condition corrected to 100 MHz.



Updates to OE VIH minimum and VIL maximum values.



Updated Table 2 on page 5.



Dual CMOS nominal frequency maximum added.



Total stability footnotes clarified for 10 year aging at

40 °C.



Disable time maximum values updated.



Enable time parameter added.



Updated Table 3 on page 6.



CMOS output rise / fall time typical and maximum

values updated.



LVPECL/HCSL output rise / fall time maximum value

updated.



LVPECL output swing maximum value updated.



LVDS output common mode typical and maximum

values updated.



HCSL output swing maximum value updated.



Duty cycle minimum and maximum values tightened to

48/52%.



Updated Table 4 on page 7.



Phase jitter test condition and maximum value updated.



Phase noise typical values updated.



Additive RMS jitter due to external power supply noise

typical values updated.



Footnote 3 updated limiting the VDD to 2.5/3.3V



Added Tables 5, 6, 7 for LVDS, HCSL, CMOS, and

Dual CMOS operations.



Moved Absolute Maximum Ratings table.



Added note to Figure 2 clarifying CMOS and Dual

CMOS maximum frequency.



Updated Figure 10 outline diagram to correct pinout.

Revision 1.0 to Revision 1.1



Updated Table 3.



CMOS Output Rise/Fall Time Test Condition updated.

Revision 1.1 to Revision 1.2



Updated Table 3.



Separated LVPECL and HCSL output Rise/Fall time

specs.



Min Rise/Fall times added.

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