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HMC7043LP7FE Datasheet(PDF) 32 Page - Analog Devices |
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HMC7043LP7FE Datasheet(HTML) 32 Page - Analog Devices |
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32 / 44 page  Data Sheet HMC7043 Rev. B | Page 31 of 43 Address (Hex) Register Name Bit 7 (MSB) Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 (LSB) Default Value (Hex) 0x0104 Channel Output 6 control High performance mode SYNC enable Slip enable Reserved Start-Up Mode[1:0] Multislip enable Channel enable 0xF3 0x0105 12-Bit Channel Divider[7:0] (LSB) 0x02 0x0106 Reserved 12-Bit Channel Divider[11:8] (MSB) 0x00 0x0107 Reserved Fine Analog Delay[4:0] 0x00 0x0108 Reserved Coarse Digital Delay[4:0] 0x00 0x0109 12-Bit Multislip Digital Delay[7:0] (LSB) 0x00 0x010A Reserved 12-Bit Multislip Digital Delay[11:8] (MSB) 0x00 0x010B Reserved Output Mux Selection[1:0] 0x00 0x010C Idle at Zero[1:0] Dynamic driver enable Driver Mode[1:0] Reserved Driver Impedance[1:0] 0x01 0x010E Channel Output 7 control High performance mode SYNC enable Slip enable Reserved Start-Up Mode[1:0] Multislip enable Channel enable 0xFD 0x010F 12-Bit Channel Divider[7:0] (LSB) 0x00 0x0110 Reserved 12-Bit Channel Divider[11:8] (MSB) 0x01 0x0111 Reserved Fine Analog Delay[4:0] 0x00 0x0112 Reserved Coarse Digital Delay[4:0] 0x00 0x0113 12-Bit Multislip Digital Delay[7:0] (LSB) 0x00 0x0114 Reserved 12-Bit Multislip Digital Delay[11:8] (MSB) 0x00 0x0115 Reserved Output Mux Selection[1:0] 0x00 0x0116 Idle at Zero[1:0] Dynamic driver enable Driver Mode[1:0] Reserved Driver Impedance[1:0] 0x30 0x0118 Channel Output 8 control High performance mode SYNC enable Slip enable Reserved Start-Up Mode[1:0] Multislip enable Channel enable 0xF3 0x0119 12-Bit Channel Divider[7:0] (LSB) 0x02 0x011A Reserved 12-Bit Channel Divider[11:8] (MSB) 0x00 0x011B Reserved Fine Analog Delay[4:0] 0x00 0x011C Reserved Coarse Digital Delay[4:0] 0x00 0x011D 12-Bit Multislip Digital Delay[7:0] (LSB) 0x00 0x011E Reserved 12-Bit Multislip Digital Delay[11:8] (MSB) 0x00 0x011F Reserved Output Mux Selection[1:0] 0x00 0x0120 Idle at Zero[1:0] Dynamic driver enable Driver Mode[1:0] Reserved Driver Impedance[1:0] 0x01 0x0122 Channel Output 9 control High performance mode SYNC enable Slip enable Reserved Start-Up Mode[1:0] Multislip enable Channel enable 0xFD 0x0123 12-Bit Channel Divider[7:0] (LSB) 0x00 0x0124 Reserved 12-Bit Channel Divider[11:8] (MSB) 0x01 0x0125 Reserved Fine Analog Delay[4:0] 0x00 0x0126 Reserved Coarse Digital Delay[4:0] 0x00 0x0127 12-Bit Multislip Digital Delay[7:0] (LSB) 0x00 0x0128 Reserved 12-Bit Multislip Digital Delay[11:8] (MSB) 0x00 0x0129 Reserved Output Mux Selection[1:0] 0x00 0x012A Idle at Zero[1:0] Dynamic driver enable Driver Mode[1:0] Reserved Driver Impedance[1:0] 0x30 |
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