2.375V to 5.25V, 4-Wire Touch-Screen Controller

with Internal Reference and Temperature Sensor

16

______________________________________________________________________________________

The fastest the MXB7846 can run with CS held continu-

ously low is 15 clock conversions. Figure 10 shows the

serial-interface timing necessary to perform a conver-

sion every 15 DCLK cycles. If CS is connected low and

DCLK is continuous, guarantee a start bit by first clock-

ing in 16 zeros.

Most microcontrollers (µCs) require that data transfers

occur in multiples of eight DCLK cycles; 16 clocks per

conversion is typically the fastest that a µC can drive the

MXB7846. Figure 11 shows the serial interface timing nec-

essary to perform a conversion every 16 DCLK cycles.

8-Bit Conversion

The MXB7846 provides an 8-bit conversion mode

selected by setting the MODE bit in the control byte

high. In the 8-bit mode, conversions complete four

clock cycles earlier than in the 12-bit output mode,

resulting in 25% faster throughput. This can be used in

conjunction with serial interfaces that provide 12-bit

transfers, or two conversions could be accomplished

with three 8-bit transfers. Not only does this shorten each

conversion by 4 bits, but each conversion can also

occur at a faster clock rate since settling to better than 8

bits is all that is required. The clock rate can be as much

as 25% faster. The faster clock rate and fewer clock

cycles combine to increase the conversion rate.

SUPPLY CURRENT (typ) (µA)

PD1

PD0

PENIRQ

STATUS

DURING

CONVERSION

AFTER

CONVERSION

00

Enabled

ADC is ON during conversion, OFF between conversion

200

1

01

Disabled

ADC is always ON, reference is always OFF

200

200

10

Disabled

ADC is always OFF, reference is always ON

400

400

11

Disabled

ADC is always ON, reference is always ON

600

600

Table 4. Power-Mode Selection

DCLK

18

9

12

16

4

5

6

7

8

9

10

11

3

2

10

20

24

4

DOUT

A/D STATE

BUSY

CS

DIN

SA2

A1

A0

MODE

ON

OFF

(MSB)

(LSB)

CONVERSION

ACQUIRE

IDLE

IDLE

IDLE

ACQUIRE

CONVERSION

IDLE

RB1

OFF

OFF

OFF

ON

PD1

PD0

(START)

SER/

DFR

DRIVERS 1 AND 2

(SER/DFR HIGH)

DRIVERS 1 AND 2

(SER/DFR LOW)

Figure 9. Conversion Timing, 24-Clock per Conversion, 8-Bit Bus Interface