MB95650L datasheet(82/105 Pages) CYPRESS

82 / 105 page

Document Number: 002-04696 Rev. *A

Page 82 of 105

MB95650L Series

(VCC = 3.0 V to 5.5 V, VSS = 0.0 V, TA = 40 °C to 85 °C)

(Continued)

Parameter

Symbol

name

Condition

Value*2

Unit

Remarks

Min

Max

SCL clock “L”

width

tLOW

SCL0,

SCL1

R = 1.7 k

,

C = 50 pF*1

 nm/2)tMCLK  20

—

ns Master mode

SCL clock “H”

width

tHIGH

SCL0,

SCL1

(nm/2)tMCLK  20

(nm/2)tMCLK  20

ns Master mode

START

condition hold

time

tHD;STA

SCL0,

SCL1,

SDA0,

SDA1

(-1

 nm/2)tMCLK  20

(-1

 nm)tMCLK  20

Master mode

Maximum value is

applied when m, n =

1, 8.

Otherwise, the

minimum value is

applied.

STOP condition

setup time

tSU;STO

SCL0,

SCL1,

SDA0,

SDA1

 nm/2)tMCLK  20

 nm/2)tMCLK  20

ns Master mode

START

condition setup

time

tSU;STA

SCL0,

SCL1,

SDA0,

SDA1

 nm/2)tMCLK  20

 nm/2)tMCLK  20

ns Master mode

Bus free time

between STOP

condition and

START

condition

tBUF

SCL0,

SCL1,

SDA0,

SDA1

(2 nm

 4) tMCLK  20

—

Data hold time

tHD;DAT

SCL0,

SCL1,

SDA0,

SDA1

3 tMCLK  20

—

ns Master mode

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