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MB95650L Datasheet(PDF) 28 Page - Cypress Semiconductor |
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MB95650L Datasheet(HTML) 28 Page - Cypress Semiconductor |
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28 / 105 page ![]() Document Number: 002-04696 Rev. *A Page 28 of 105 MB95650L Series (Continued) R/W access symbols Initial value symbols Note: Do not write to an address that is “(Disabled)”. If a “(Disabled)” address is read, an indeterminate value is returned. Address Register abbreviation Register name R/W Initial value 0x0F9C to 0x0FBB — (Disabled) — — 0x0FBC BGR1 LIN-UART baud rate generator register 1 R/W 0b00000000 0x0FBD BGR0 LIN-UART baud rate generator register 0 R/W 0b00000000 0x0FBE PSSR0 UART/SIO dedicated baud rate generator prescaler select register ch. 0 R/W 0b00000000 0x0FBF BRSR0 UART/SIO dedicated baud rate generator baud rate setting register ch. 0 R/W 0b00000000 0x0FC0 to 0x0FC2 — (Disabled) — — 0x0FC3 AIDRL A/D input disable register (lower) R/W 0b00000000 0x0FC4 to 0x0FE3 — (Disabled) — — 0x0FE4 CRTH Main CR clock trimming register (upper) R/W 0b000XXXXX 0x0FE5 CRTL Main CR clock trimming register (lower) R/W 0b000XXXXX 0x0FE6 SYSC2 System configuration register 2 R/W 0b00000000 0x0FE7 CRTDA Main CR clock temperature dependent adjustment register R/W 0b000XXXXX 0x0FE8 SYSC System configuration register R/W 0b00111111 0x0FE9 CMCR Clock monitoring control register R/W 0b00000000 0x0FEA CMDR Clock monitoring data register R 0b00000000 0x0FEB WDTH Watchdog timer selection ID register (upper) R 0bXXXXXXXX 0x0FEC WDTL Watchdog timer selection ID register (lower) R 0bXXXXXXXX 0x0FED to 0x0FFF — (Disabled) — — R/W : Readable/Writable R : Read only 0 : The initial value of this bit is “0”. 1 : The initial value of this bit is “1”. X : The initial value of this bit is undefined. |
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