SPL10A1

4

„ MEMORY and I/O MAP

$0000

$001F

$00A0

$00FF

$0100

$01FF

$0200

$03FF

$0400

$1FFF

SUNPLUS TEST PROGRAM

$05FF

$0600

H/W REGISTER,I/Os

USER RAM and STACK

DUMMY for ICE DEBUG

USER'S PROGRAM DATA

AREA ROM

USER'S PROGRAM DATA

AREA ROM

„OSCILLATORS

The SPL10A1 has dual clock system that one is for the CPU and system and the other

is for the LCD scanning and interrupt sources.

1. R Oscillator for the CPU and system clock

1.1 Normal case

1.2 Noise Environment

+V

DD

+V

DD

Note: Length of the wiring for ROSC pin should be minimized because the oscillator

frequency varies due to coupling from other signal lines.