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SPL10A Datasheet(PDF) 5 Page - List of Unclassifed Manufacturers |
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SPL10A Datasheet(HTML) 5 Page - List of Unclassifed Manufacturers |
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5 / 24 page ![]() SPL10A1 5 2. 32768Hz crystal oscillator or R oscillator (mask option) for LCD scanning and interrupt sources (2 KHz, LCDL for LCD service,128 Hz, 2Hz). It is suggested to enable 32768Hz crystal in strong mode for a few seconds and then switch to weak mode when reset occurs. X32I X32O C1 C2 32768Hz 32768Hz Crystal 20p 20p +V DD X32I R Oscillator R Note: Length of the wiring for X32I and X32O should be as short as possible. STOP CLOCK MODE The SPL10A1 supports the power saving mode for those applications needed very low standby current. The user can simply enable the wake-up sources then stop the CPU clock by writing the STOP CLOCK register ($09). The CPU will go to stand-by and the RAM and I/O remains their previous states until wake-up. There are three sources of wake-up in this chip, PORT IOEF wake-up, TIMER 0 wake-up and 2 Hz wake-up. After the chip being waken up, the internal CPU will go to the RESET state the RAM and I/O are not affected by the wake-up reset. The standby current of timepiece product typically is less than 3 µA@3V by using this mode and 32768Hz clock source in weak mode. For non-timepiece products, 32768Hz crystal driver or R oscillator (mask option) that generates the 32768Hz clock source also can be turned off, then the whole chip stops. The standby current of the SPL10A1 is less than 1 µA@3V. In this mode, IOEF port can be used to wake up this chip. TIMER/COUNTER The SPL10A1 contains one 12-bit timer/counter,TM0.In timer mode,TM0 is reloadable up-counter. When timer overflows from 0FFF to 0000, the carry signal will generate the INTERRUPT signal if the corresponding bit is enabled in INT ENABLE register ($0D),and the timer will be auto reloaded to the user‘s setup value and upcount again. If TM0 being specified as a counter, the user may reset the counter by loading 0 into register $14 and $1C. After the counter being activated, the count value can also be read from above registers on-the-fly, the read instruction will not affect the counter's value or reset it. |
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