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scan).

To improve the performance of this mode, there is also a 12 bit/8

slot (full duplex) mode available. In this mode coefficient reads

take 1 MCLK each (a total of 2 MCLKs). The high and low bytes

of the 12 bit word are each read from RAM and transmitted to the

host in 1 MCLK cycle. To slightly reduce the speed requirements

of SRAM, the high and low byte writes to RAM are given 2

MCLKs each. This allows the host to read pixel data from the

SRAM while scanning, dramatically reducing the time required to

scan versus using the half duplex mode.

To minimize EMI and on-chip noise, the SRAM output drivers (A0-

A17, DB0-DB7, and RD and WR) have four output current set-

tings, 0-3. The output current level is set by bits 2 and 3 of Config-

uration Register 43.

4.5 Misc. I/O

These four pins are used for paper sensing, LED displays, user

start buttons, etc.

Two pins are dedicated inputs: Paper Sensor #1 and Paper Sen-

sor #2. The other two pins, Misc I/O #1 and Misc I/O #2, can be

configured as inputs or outputs.

The state of each pin, True or False (1 or 0), is reflected in the

Status Register.

These are the configurable aspects of these I/O pins:

• The polarity of the input. If this bit is set to a 1 (Active High), a

high level on that input pin will produce a True reading (1) in the

Status Register. If this bit is set to a 0 (Active Low), a low level

on that input pin will produce a True reading (1) in the Status

• Level or Edge Sensitive. If this bit is set to 0 (Level Sensitive),

the Status Register will reflect the current state at that sensor

input pin. If this bit is set to 1 (Edge Sensitive), the Status Reg-

ister for that input will be True (1) if there were any False to True

transitions at that sensor input pin since the last time the Status

of all the edge sensitive inputs to False (0).

• Paper Sensor #1 can be programmed to stop the scan (by

clearing the Scanning bit) when its state (as reflected in the

Status Register) changes from False to True. This is useful in

flatbeds to prevent the motor from trying to step past the limits

of travel of the system. In sheetfed systems, Paper Sensor #1

can be used to detect whether or not the user has inserted a

document to be scanned.

• Paper Sensor #2 can be programmed to stop the scan (by

clearing the Scanning bit) and change its bit in the Status Reg-

ister to True a programmable number of lines after its input pin

changes state from False to True. In sheetfed scanners this is

useful if the paper sensor is located

before the scanner array,

where the sensor will change states before all of the paper has

been scanned. For flatbed scanners this sensor can be used to

detect the home position.

• The Misc I/O 1 and Misc I/O 2 pins can have their outputs set to

+5V or 0V by writing a 1 or a 0 to the appropriate register.

4.6 The Brains

This is the master control section that keeps track of the position

of the CCD pixel going through the analog front end, the color of

that line of CCDs (for single output CCD illumination control), the

stepper motor, and all other system coordination.

5.0 Communicating with the LM9830

Everything on the LM9830 (configuration registers, image data,

coefficient data, and gamma tables) is accessed through the

Configuration Register. Configuration Register I/O is done

through two steps. The first step is to write the address (0 through

7F) of the configuration register to be read from or written to. The

second access is the data operation (a read or a write) for that

address. The address only needs to be written once. After an

address is written, any number of reads and/or writes may be

made to that address.

Registers 0, 1, and 2 are read-only registers. Writing to these

addresses may affect various counters inside the LM9830 and

should therefore be avoided. All of the remaining configuration

registers can be read from and written to using this protocol.

5.1 The DataPort: Reading and Writing to Gamma, Offset,

and Gain Memory

Because the gamma table and the shading and offset correction

blocks of RAM are very large, the LM9830 uses an indexed

method of reading and writing them, called the DataPort. Four

addresses in the Configuration Register are used to implement

this mode, as shown in Figure 44.

Current

Setting

IOL

(mA)

IOH

(mA)

tF (ns)

20pF

tR (ns)

20pF

3.5

-4

-7.5

212

-17

321

-32

229,376

16384

49152

64K SRAM, 300 DPI

Coefficients

Line Buffer

32768

256K SRAM, 600 DPI

Coefficients

Line Buffer

32768

98304

128K SRAM, 600 DPI

Coefficients

Line Buffer

Figure 43: Typical Memory Maps for External SRAM

Configuration

Address

Name

Bits

DataPort

Target/

Color

b3- b0

DataPort

Address

(MSB)

b12 - b8

Figure 44: DataPort

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