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PCI7421 Datasheet(PDF) 169 Page - Texas Instruments |
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PCI7421 Datasheet(HTML) 169 Page - Texas Instruments |
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169 / 298 page ![]() 7−9 7.12 Subsystem Identification Register The subsystem identification register is used for system and option card identification purposes. This register can be initialized from the serial EEPROM or programmed via the subsystem access register at offset F8h in the PCI configuration space (see Section 7.25). See Table 7−10 for a complete description of the register contents. Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 Name Subsystem identification Type RU RU RU RU RU RU RU RU RU RU RU RU RU RU RU RU Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Name Subsystem identification Type RU RU RU RU RU RU RU RU RU RU RU RU RU RU RU RU Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Register: Subsystem identification Offset: 2Ch Type: Read/Update Default: 0000 0000h Table 7−10. Subsystem Identification Register Description BIT FIELD NAME TYPE DESCRIPTION 31−16 ‡ OHCI_SSID RU Subsystem device ID. This field indicates the subsystem device ID. 15−0 ‡ OHCI_SSVID RU Subsystem vendor ID. This field indicates the subsystem vendor ID. ‡ These bits are cleared only by the assertion of GRST. 7.13 Power Management Capabilities Pointer Register The power management capabilities pointer register provides a pointer into the PCI configuration header where the power-management register block resides. The PCI7x21/PCI7x11 configuration header doublewords at offsets 44h and 48h provide the power-management registers. This register is read-only and returns 44h when read. Bit 7 6 5 4 3 2 1 0 Name Power management capabilities pointer Type R R R R R R R R Default 0 1 0 0 0 1 0 0 Register: Power management capabilities pointer Offset: 34h Type: Read-only Default: 44h |
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