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MTV030 Revision 1.0 10/15/1999

MTV030

MYSON

TECHNOLOGY

CSR, CSG, CSB - Define the color of bordering or shadowing on characters. The initial value is (0, 0, 0) after

power up.

FSW - Enable full screen self-test pattern and force the FBKG pin output to high to disable video RGB while

this bit is set to "1". The self-test pattern’s color is determined by (FSR, FSG, FSB) bits.

FSR, FSG, FSB - Define the color of full screen self-test pattern.

WW41, WW40 - Determines the shadow width of the window 4 when WSHD bit of th window 4 is enabled.

Please refer to the Table 6 for more details.

TABLE 6. Shadow Width Setting

WW31, WW30 - Determines the shadow width of the window 3 when WSHD bit of th window 3 is enabled.

WW21, WW20 - Determines the shadow width of the window 2 when WSHD bit of th window 2 is enabled.

WW11, WW10 - Determines the shadow width of the window 1 when WSHD bit of th window 1 is enabled.

WH41, WH40 - Determines the shadow height of the window 4 when WSHD bit of th window 4 is enabled.

Please refer to the Table 7 for more details.

TABLE 5. PWMCK Frequency and PWMDA sampling rate

(VCO1, VCO0)

PWMCK Freq (14M ~ 28MHz)

PWMDA sampling rate (54K ~ 109KHz)

( 0, 0 )

HFLB Freq * HORR * 12

HFLB Freq * HORR * 12 / 256

( 0, 1 )

HFLB Freq * HORR * 6

HFLB Freq * HORR * 6 / 256

( 1, 0 )

HFLB Freq * HORR * 3

HFLB Freq * HORR * 3 / 256

( 1 ,1 )

HFLB Freq * HORR * 3 / 2

HFLB Freq * HORR * 3 / 512

Column 19

B7

b6

b5

b4

b3

b2

b1

b0

-

-

-

-

-

CSR

CSG

CSB

Column 20

B7

b6

b5

b4

b3

b2

b1

b0

FSW

-

-

-

-

FSR

FSG

FSB

Column 21

B7

b6

b5

b4

b3

b2

b1

b0

WW41

WW40

WW31

WW30

WW21

WW20

WW11

WW10

(WW41, WW40)

(0, 0)

(0, 1)

(1, 0)

(1, 1)

Shadow Width

(unit in Pixel)

2

4

6

8

Column 22

B7

b6

b5

b4

b3

b2

b1

b0

WH41

WH40

WH31

WH30

WH21

WH20

WH11

WH10