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MTV030 Datasheet(PDF) 16 Page - List of Unclassifed Manufacturers |
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MTV030 Datasheet(HTML) 16 Page - List of Unclassifed Manufacturers |
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16 / 21 page ![]() 16/21 MTV030 Revision 1.0 10/15/1999 MTV030 MYSON TECHNOLOGY All these measurements commence at the following VFLB pulse after enabling VMEN bit, complete the meas- urement after one vertical frame, so minimum delay 2 vertical frame time after enabling VMEN bit is needed to read out the measurement data. The horizontal measurement for R,G,BIN will store the minimum start loca- tion and the maximum ending location in one vertical frame into registers. All of the input signals for timing measurement are polarity programmable, so the different phase measurement can be obtained. Auto sizing video measurement data bytes : read only registers b1 ~ b0 : The most significant 2 bits of Dhrgbsta which represents the distance between the first active edge of R,G,BIN input and reference HFLB leading edge. See Figure 10. b7 ~ b0 : The least significant 8 bits of Dhrgbsta which represents the distance between the first active edge of R,G,BIN input and reference HFLB leading edge. See Figure 10. b1 ~ b0 : The most significant 2 bits of Dhrgbend which represents the distance between the last active edge of R,G,BIN input and reference HFLB leading edge. See Figure 10. b7 ~ b0 : The least significant 8 bits of Dhrgbend which represents the distance between the last active edge of R,G,BIN input and reference HFLB leading edge. See Figure 10. b2 ~ b0 : The most significant 3 bits of Dvrgbsta which represents the H line distance between the first active line of R,G,BIN input and reference VFLB leading edge. See Figure 10. b7 ~ b0 : The least significant 8 bits of Dvrgbsta which represents the H line distance between the first active line of R,G,BIN input and reference VFLB leading edge. See Figure 10. Byte 0 B7 b6 b5 b4 b3 b2 b1 b0 - - - - - - Dhrgbsta MSB Byte 1 B7 b6 b5 b4 b3 b2 b1 b0 Dhrgbsta LSB Byte 2 B7 b6 b5 b4 b3 b2 b1 b0 - - - - - - Dhrgbend MSB Byte 3 B7 b6 b5 b4 b3 b2 b1 b0 Dhrgbend LSB Byte 4 B7 b6 b5 b4 b3 b2 b1 b0 - - - - - Dvrgbsta MSB Byte 5 B7 b6 b5 b4 b3 b2 b1 b0 Dvrgbsta LSB |
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