AD5450/AD5451/AD5452/AD5453

–15–

REV. PrD

PRELIMINARY TECHNICAL DATA

of the DAC. This is done by using low inputs capacitance

buffer amplifiers and careful board design.

Most single supply circuits include ground as part of the

analog signal range, which in turns requires an

ampliferthat can handle rail to rail signals, there is a large

range of single supply amplifiers available from Analog

Devices.

PCB LAYOUT AND POWER SUPPLY DECOUPLING

In any circuit where accuracy is important, careful

consideration of the power supply and ground return

layout helps to ensure the rated performance. The printed

circuit board on which the AD5426/AD5432/AD5443 is

mounted should be designed so that the analog and digital

sections are separated, and cofined to certain areas of the

board. If the DAC is in a system where multiple devices

require an AGND-to-DGND connection, the connection

should be made at one point only. The star ground point

should be established as close as possible to the device.

These DACs should have ample supply bypassing of 10

µF in parallel with 0.1 µF on the supply located as close

to the package as possible, ideally right up against the

device. The 0.1 µF capacitor should have low Effective

Series Resistance (ESR) and Effective Series Inductance

(ESI), like the common ceramic types that provide a low

impedance path to ground at high frequencies, to handle

transient currents due to internal logic switching. Low

ESR 1 µF to 10 µF tantalum or electrolytic capacitors

should also be applied at the supplies to minimize

transient disturbance and filter out low frequency ripple.

Fast switching signals such as clocks should be shielded

with digital ground to avoid radiating noise to other parts

of the board, and should never be run near the reference

inputs.

Avoid crossover of digital and analog signals. Traces on

opposite sides of the board should run at right angles to

each other. This reduces the effects of feedthrough

through the board. A microstrip technique is by far the

best, but not always possible with a doublesided board. In

this technique, the component side of the board is

dedicated to ground plane while signal traces are placed

on the solder side.

It is good practice to employ compact, minimum lead

length PCB layout design. Leads to the input should be as

short as possible to minimize IR drops and stray

inductance.

be matched to minimize gain error. To maximize on high

frequency performance, the I-to-V amplifier should be

located as close to the device as possible.

Table IV. Listing of suitable ADI Precision References recommended for use with AD5450/1/2/3 DACs.

Reference

Output Voltage

Initial Tolerance

Temperature Drift

0.1Hz to 10Hz noise

Package

ADR01

10 V

0.1%

3ppm/

µVp-p

SC70, TSOT, SOIC

ADR02

5 V

0.1%

3ppm/

µVp-p

SC70, TSOT, SOIC

ADR03

2.5 V

0.2%

3ppm/

µVp-p

SC70, TSOT, SOIC

ADR425

5 V

0.04%

3ppm/

3.4

µVp-p

MSOP, SOIC

Table V. Listing of some precision ADI Op Amps suitable for use with AD5450/1/2/3 DACs.

Part #

Max Supply Voltage V

µµµµµVI

GBP MHz

Slew Rate V/

µµµµµst

AD5453

OP97

±

20

25

0.1

0.9

0.2

60

2

1.3

0.7

AD8551 ± 6

5

0.05

1.5

0.4

Table VI. Listing of some High Speed ADI Op Amps suitable for use with AD5450/1/2/3 DACs.

Part #

Max Supply Voltage V

Slew Rate V/

µµµµµst

AD5453

µµµµµVI

AD8065 ±12

145

180

1500

0.01

AD8021 ±12

200

100

1000

1000

AD8038 ± 5

350

425

3000

0.75

AD9631 ± 5

320

1300

10000

7000