SiC620, SiC620A

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Vishay Siliconix

S14-2385-Rev. E, 08-Dec-14

5

Document Number: 62922

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

Notes

DETAILED OPERATIONAL DESCRIPTION

PWM Input with Tri-state Function

The PWM input receives the PWM control signal from the VR

controller IC. The PWM input is designed to be compatible

with standard controllers using two state logic (H and L) and

advanced controllers that incorporate tri-state logic (H, L

and tri-state) on the PWM output. For two state logic, the

PWM input operates as follows. When PWM is driven above

high-side is turned OFF and the low-side is turned ON. For

tri-state logic, the PWM input operates as previously stated

for driving the MOSFETs. However, there is an third state

that is entered as the PWM output of tri-state compatible

controller enters its high impedance state during shut-down.

The high impedance state of the controller’s PWM output

allows the SiC620 and SiC620A to pull the PWM input into

the tri-state region (see PWM Timing Diagram). If the PWM

input stays in this region for the tri-state hold-off period,

OFF. This function allows the VR phase to be disabled

without negative output voltage swing caused by inductor

ringing and saves a Schottky diode clamp. The PWM and

tri-state regions are separated by hysteresis to prevent false

triggering.

The

SiC620A

incorporates

PWM

voltage

thresholds that are compatible with 3.3 V logic and the

SiC620 thresholds are compatible with 5 V logic.

Disable (DSBL#)

In the low state, the DSBL# pin shuts down the driver IC and

disables both high-side and low-side MOSFETs. In this

state, standby current is minimized. If DSBL# is left

unconnected, an internal pull-down resistor will pull the pin

Diode Emulation Mode (ZCD_EN#)

When ZCD_EN# pin is logic Low and PWM signal switches

Low, GL is forced on (after normal BBM time). During this

time, it is under control of the ZCD (zero crossing detect)

comparator. If, after the internal blanking delay, the inductor

current becomes zero, the low-side is turned off. This

improves light load efficiency by avoiding discharge of

output capacitors. If PWM enters tri-state, then device will

go into normal tri-state mode after tri-state delay. The GL

output will be turned off regardless of Inductor current, this

is an alternative method of improving light load efficiency by

reducing switching losses.

Thermal Shutdown Warning (THWn)

The THWn pin is an open drain signal that flags the presence

of

excessive

junction

temperature.

Connect

with

a

maximum of 20 k

detects

the

junction

temperature.

The

temperature

threshold is 160 °C. When this junction temperature is

exceeded the THWn flag is set. When the junction

temperature drops below 135 °C the device will clear the

THWn signal. The SiC620 and SiC620A do not stop

operation when the flag is set. The decision to shutdown

must be made by an external thermal control function.

This is the power input to the drain of the high-side power

MOSFET. This pin is connected to the high power

intermediate BUS rail.

DSBL# ZCD_EN# INPUT

DSBL# Logic Input Voltage

Input logic high

2

-

-

V

Input logic low

-

-

0.8

ZCD_EN# Logic Input Voltage

Input logic high

2

-

-

Input logic low

-

-

0.8

PROTECTION

Under Voltage Lockout

-

3.7

4.1

V

2.7

3.1

-

Under Voltage Lockout Hysteresis

-

575

-

mV

-

160

-

°C

-

135

-

-25-

THWn Output Low

-

0.02

-

V

ELECTRICAL SPECIFICATIONS

PARAMETER

SYMBOL

TEST CONDITION

LIMITS

UNIT

MIN.

TYP.

MAX.