SC2200 datasheet(261/433 Pages) NSC

261 / 433 page

Revision 3.0

261

www.national.com

Core Logic Module (Continued)

3:0

SCI_IRQ_ROUTE. SCI is routed to:

0000: Disable

0100: IRQ4

1000: IRQ8

1100: IRQ12

0001: IRQ1

0101: IRQ5

1001: IRQ9

1101: IRQ13

0010: Reserved

0010: IRQ6

1010: IRQ10

1110: IRQ14

0011: IRQ3

0011: IRQ7

1011: IRQ11

1111: IRQ15

For more details see Section 5.2.6.3 "Programmable Interrupt Controller" on page 164.

Offset 1Ch-1Fh

PM_TMR — ACPI Timer Register (RO)

Reset Value: xxxxxxxxh

Note:

This register can also be read at F1BAR0+I/O Offset 1Ch.

31:24

Reserved.

23:0

TMR_VAL. (Read Only) This bit field contains the running count of the power management timer.

Offset 20h

PM2_CNT — PM2 Control Register (R/W)

Reset Value: 00h

7:1

Reserved.

Arbiter Disable. Disables the PCI arbiter when set by the OS. Used during C3 transition.

0: Arbiter not disabled. (Default)

1: Disable arbiter.

Offset 21h-FFh

Reserved

Reset Value: 00h

The read value for these registers is undefined.

Table 5-34. F1BAR1+I/O Offset: ACPI Support Registers (Continued)

Bit

Description

SC2200 Datasheet(PDF) 261 Page - National Semiconductor (TI)

SC2200 Datasheet(HTML) 261 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL