SC2200 datasheet(304/433 Pages) NSC

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Revision 3.0

Core Logic Module (Continued)

I/O Port 0D0h (R/W)

Read

DMA Status Register, Channels 7:4

Channel 7 Request. Indicates if a request is pending.

0: No.

1: Yes.

Channel 6 Request. Indicates if a request is pending.

0: No.

1: Yes.

Channel 5 Request. Indicates if a request is pending.

0: No.

1: Yes.

Undefined

Channel 7 Terminal Count. Indicates if TC was reached.

0: No.

1: Yes.

Channel 6 Terminal Count. Indicates if TC was reached.

0: No.

1: Yes.

Channel 5 Terminal Count. Indicates if TC was reached.

0: No.

1: Yes.

Undefined.

Write

DMA Command Register, Channels 7:4

DACK Sense.

0: Active high.

1: Active low.

DREQ Sense.

0: Active high.

1: Active low.

Write Selection.

0: Late write.

1: Extended write.

Priority Mode.

0: Fixed.

1: Rotating.

Timing Mode.

0: Normal.

1: Compressed.

Channels 7:4.

0: Disable.

1: Enable.

1:0

Reserved. Must be set to 0.

Table 5-43. DMA Channel Control Registers (Continued)

Bit

Description

SC2200 Datasheet(PDF) 304 Page - National Semiconductor (TI)

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