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TP3410 Datasheet(PDF) 15 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # TP3410
Description  TP3410 ISDN Basic Access Echo-Cancelling 2B1Q U Transceiver
PDF  32 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

TP3410 Datasheet(HTML) 15 Page - National Semiconductor (TI)

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Functional Description (Continued)
TABLE II Command Registers
Function
Byte 1 (Register Address)
Byte 2 (Data)
76543210
7
6
5
4
3
2
1
0
No Operation (NOP)
0
0
000000
0
0
0
0
0
0
0
0
Write OPR
0
0
100000
CIE
EIE
FIE
OB1
OB0
OC1
OC0
0
Readback OPR
0
0
100001
X
X
X
X
X
X
X
X
Write CR1
0
0
100010
FF1
FF0
CK2
CK1
CK0
DDM
CMS BEX
Readback CR1
0
0
100011
X
X
X
X
X
X
X
X
Write CR2
0
0
100100
SSS
NTS
DMO
DEN
DD
BP1
BP2
0
Readback CR2
0
0
100101
X
X
X
X
X
X
X
X
Write CR3
0
0
100110
LB1
LB2
LBD
DB1
DB2
DBD
TLB
0
Readback CR3
0
0
100111
X
X
X
X
X
X
X
X
Write CR4
0
0
101100
SH9 AACT
WS
333 Hz
saif
TFB0
RFS
LFS
Readback CR4
0
0
101101
X
X
X
X
X
X
X
X
Write TXB1 TSA
0
0
110000
0
0
TS5
TS4
TS3
TS2
TS1
TS0
Readback TXB1
0
0
110001
X
X
X
X
X
X
X
X
Write TXB2 TSA
0
0
110010
0
0
TS5
TS4
TS3
TS2
TS1
TS0
Readback TXB2
0
0
110011
X
X
X
X
X
X
X
X
Write RXB1 TSA
0
0
110100
EB1
ED
TS5
TS4
TS3
TS2
TS1
TS0
Readback RXB1
0
0
110101
X
X
X
X
X
X
X
X
Write RXB2 TSA
0
0
110110
EB2
0
TS5
TS4
TS3
TS2
TS1
TS0
Readback RXB2
0
0
110111
X
X
X
X
X
X
X
X
Write TXD
0
0
111000
DX5
DX4
DX3
DX2
DX1
DX0
SX1
SX0
Readback TXD
0
0
111001
X
X
X
X
X
X
X
X
Write RXD
0
0
111010
DR5
DR4
DR3
DR2
DR1
DR0
SR1
SR0
Readback RXD
0
0
111011
X
X
X
X
X
X
X
X
Write TXM4
0
1
000000
ACT
M42
M43
M44
M45
M46
M47
M48
Write TXM56
0
1
000010
0
0
LEC
M51
M61
M52
TFB
CTC
Write ACT Register
0
1
000100
0
0
0
0
C4
C3
C2
C1
Write ECT1
0
1
000110
O7
O6
O5
O4
O3
O2
O1
O0
Read BEC1
0
1
000111
X
X
X
X
X
X
X
X
Write TX EOC Register
0
1
0
1
ea1
ea2
ea3
dm
ei1
ei2
ei3
ei4
ei5
ei6
ei7
ei8
Note 1
Bit 7 of byte 1 is always the first bit clocked into the device
Note 2
In the Tx EOC Register
ea1 e the msb of the EOC destination address
ea2 e bit 2 of the EOC destination address
ea3 e the lsb of the EOC destination address
dm e the EOC datamessage mode indicator
Note 3
X e don’t care (it is recommended that these bits be set e 0)
15



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