AD7927 datasheet(13/20 Pages) AD

13 / 20 page

REV. 0

AD7927

–13–

ADC TRANSFER FUNCTION

The output coding of the AD7927 is either straight binary or

twos complement, depending on the status of the LSB in the

Control Register. The designed code transitions occur at suc-

cessive LSB values (i.e., 1 LSB, 2 LSBs, and so forth). The LSB

REFIN

VIN0

VIN7

AD7927

DSP/ P

VDD

0.1 F

AVDD

VDRIVE

DOUT

TWOS

COMPLEMENT

+REFIN

REFIN

–REFIN

011…111

000…000

100…000

(= 0V)

(= 2

REFIN)

VDD

VREF

Figure 10. Handling Bipolar Signals

000…000

ANALOG INPUT

111…111

000…001

000…010

111…110

•

111…000

•

011…111

•

1 LSB

+VREF

1 LSB

1LSB

VREF/4096

NOTE: VREF IS EITHER REFIN OR 2

REFIN

Figure 8. Straight Binary Transfer Characteristic

size is REFIN/4096 for the AD7927. The ideal transfer charac-

teristic for the AD7927 when straight binary coding is selected

is shown in Figure 8, and the ideal transfer characteristic for the

AD7927 when twos complement coding is selected is shown in

Figure 9.

–VREF

1LSB

ANALOG INPUT

+VREF

1LSB

VREF 4096

VREF

1LSB

100…000

011…111

100…001

100…010

011…110

•

000…001

111…111

•

000…000

Figure 9. Twos Complement Transfer Characteristic with

REFIN

± REFIN Input Range

Handling Bipolar Input Signals

Figure 10 shows how useful the combination of the 2

¥ REFIN

input range and the twos complement output coding scheme is

for handling bipolar input signals. If the bipolar input signal is

biased about REFIN and twos complement output coding is

selected, then REFIN becomes the zero code point, –REFIN is

negative full scale and +REFIN becomes positive full scale, with

a dynamic range of 2

¥ REFIN.

TYPICAL CONNECTION DIAGRAM

Figure 11 shows a typical connection diagram for the AD7927.

In this setup, the AGND pin is connected to the analog ground

plane of the system. In Figure 11, REFIN is connected to a

decoupled 2.5 V supply from a reference source, the AD780, to

provide an analog input range of 0 V to 2.5 V (if RANGE bit is 1)

or 0 V to 5 V (if RANGE bit is 0). Although the AD7927 is con-

nected to a AVDD of 5 V, the serial interface is connected to a 3 V

microprocessor. The VDRIVE pin of the AD7927 is connected to

the same 3 V supply of the microprocessor to allow a 3 V logic

interface (see the Digital Inputs section). The conversion result is

output in a 16-bit word. This 16-bit data stream consists of one

leading zero, three address bits indicating which channel the

conversion result corresponds to, followed by the 12 bits of

conversion data. For applications where power consumption is

of concern, the power-down modes should be used between

conversions or bursts of several conversions to improve power

performance. (See the Modes of Operation section.)

SERIAL

INTERFACE

AD780

2.5V

AD7927

0.1 F

C/ P

0.1 F

10 F

SUPPLY

0.1 F

10 F

AGND

AVDD

VIN0

•

VIN7

0V TO REFIN

SCLK

DOUT

DIN

VDRIVE

REFIN

NOTE: ALL UNUSED INPUT CHANNELS SHOULD BE CONNECTED TO AGND

Figure 11. Typical Connection Diagram

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