LM5145 datasheet(55/67 Pages) TI1

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LM5145

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SNVSAI4 – JUNE 2017

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Layout Guidelines (continued)

ground plane(s). Pay particular attention to shielding the feedback (FB) trace from power traces and

components.

3. The upper feedback resistor can be connected directly to the output voltage sense point at the load device or

the bulk capacitor at the converter side.

4. Connect the ILIM setting resistor from the drain of the low-side MOSFET to ILIM and make the connections

as close as possible to the LM5145. The trace from the ILIM pin to the resistor should avoid coupling to a

high-voltage switching net.

5. Minimize the loop area from the VCC and VIN pins through their respective decoupling capacitors to the

GND pin. Locate these capacitors as close as possible to the LM5145.

11.1.4 Thermal Design and Layout

The useful operating temperature range of a PWM controller with integrated gate drivers and bias supply LDO

regulator is greatly affected by:

•

average gate drive current requirements of the power MOSFETs;

•

switching frequency;

•

operating input voltage (affecting bias regulator LDO voltage drop and hence its power dissipation);

•

thermal characteristics of the package and operating environment.

In order for a PWM controller to be useful over a particular temperature range, the package must allow for the

efficient removal of the heat produced while keeping the junction temperature within rated limits. The LM5145

controller is available in a small 3.5-mm x 4.5-mm VQFN-20 (RGY) PowerPAD™ package to cover a range of

application requirements. The thermal metrics of this package are summarized in Thermal Information. The

application report IC Package Thermal Metrics (SPRA953) provides detailed information regarding the thermal

information table.

The VQFN-20 package offers a means of removing heat from the semiconductor die through the exposed

thermal pad at the base of the package. While the exposed pad of the package is not directly connected to any

leads of the package, it is thermally connected to the substrate of the LM5145 device (ground). This allows a

significant improvement in heat-sinking, and it becomes imperative that the PCB is designed with thermal lands,

thermal vias, and a ground plane to complete the heat removal subsystem. The exposed pad of the LM5145 is

soldered to the ground-connected copper land on the PCB directly underneath the device package, reducing the

thermal resistance to a very low value. Wide traces of the copper tying in the no-connect pins of the LM5145

(pins 9 and 16) and connection to this thermal land helps to dissipate heat.

Numerous vias with a 0.3-mm diameter connected from the thermal land to the internal/solder-side ground

plane(s) are vital to help dissipation. In a multi-layer PCB design, a solid ground plane is typically placed on the

PCB layer below the power components. Not only does this provide a plane for the power stage currents to flow

but it also represents a thermally conductive path away from the heat generating devices.

The thermal characteristics of the MOSFETs also are significant. The drain pad of the high-side MOSFET is

normally connected to a VIN plane for heat-sinking. The drain pad of the low-side MOSFET is tied to the SW

plane, but the SW plane area is purposely kept relatively small to mitigate EMI concerns.

11.1.5 Ground Plane Design

As mentioned previously, using one or more of the inner PCB layers as a solid ground plane is recommended. A

ground plane offers shielding for sensitive circuits and traces and also provides a quiet reference potential for the

control circuitry. Connect the PGND pin to the system ground plane using an array of vias under the exposed

pad. Also connect the PGND directly to the return terminals of the input and output capacitors. The PGND net

contains noise at the switching frequency and can bounce because of load current variations. The power traces

for PGND, VIN and SW can be restricted to one side of the ground plane. The other side of the ground plane

contains much less noise and is ideal for sensitive analog trace routes.

LM5145 Datasheet(PDF) 55 Page - Texas Instruments

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