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HT45F3W Datasheet(PDF) 141 Page - Holtek Semiconductor Inc |
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HT45F3W Datasheet(HTML) 141 Page - Holtek Semiconductor Inc |
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141 / 167 page  Rev. 1.50 140 De�e��e� 01� �01� Rev. 1.50 141 De�e��e� 01� �01� HT45F3W R-Type Blood Pressure Meter Flash MCU HT45F3W R-Type Blood Pressure Meter Flash MCU Asingleregister,CHPRC,controlsoveralloperationofthechargepumpandregulator,controlling functionssuchasthechargepumpon/off,regulatoron/offanddeterminestheclockdividervalueto generatethechargepumpclockfrequency. TheREGCENbitintheCHPRCregisteristheRegulator/Charge-Pumpmoduleenable/disable controlbit.Ifthisbitisdisabled,thentheregulatorandchargepumpwillbothbedisabledtosave power.Ifthisbitissetto“0”thenthechargepumpandregulatormodulewillbepowereddown irrespectiveoftheCHPENbitsetting.IftheREGCENbitissetto“1”,theregulatorwillbeenabled. IftheCHPENisenabled,thechargepumpwillbeactiveandwilluseVDDasitsinput,togenerate thedoublevoltageoutput.Thedoublevoltagewillbeusedastheregulatorinput.IftheCHPENbit issetto“0”,thechargepumpisdisabledandthechargepumpoutputwillbeequaltothecharge pumpinputVDD. Whenusingtheregulator,itisnecessarytotakenoteoftheVDDvoltage.Ifthevoltageisunder3.6V then,theCHPENbitshouldbesethightoenablethechargepump;otherwiseCHPENshouldbe clearedtozero.IfthechargepumpisdisabledandtheVDDisunder3.6V,thentheoutputvoltageof theregulatorwillnotbeguaranteed. CHPRC Register Bit 7 6 5 4 3 2 1 0 Na�e CHPCKD4 CHPCKD3 CHPCKD� CHPCKD1 CHPCKD0 — CHPEN REGCEN R/W R/W R/W R/W R/W R/W — R/W R/W POR 0 0 0 0 0 — 0 0 Bit7~3 CHPCKD4~CHPCKD0:Chargepumpclockdivider Clockdivisionselect,rangeof1-32. ChargePumpclock=(fSYS/16)/(CHPCKD+1) ChargePumpclockshouldbeselectedtobeasnear20kHzaspossible. Bit2 Unimplemented,readas“0” Bit1 CHPEN:ChargePumpEnable/DisableControl 0:disable 1:enable Bit0 REGCEN:RegulatorEnable/DisableControl 0:disable 1:enable REGCEN (control signal) CHPEN (control signal) Charge Pump VOCHP Pin Regulator VOREG Pin Description 0 0 OFF VDD OFF Hi-I�pedan�e Co�plete �odule disa�led� OPA/ADC loses powe� 0 1 OFF VDD OFF VDD Co�plete �odule disa�led� OPA/ADC loses powe� 1 0 OFF VDD ON 3.3V Use when VDD is g�eate� than 3.8V (VDD>3.8V) 1 1 ON �xVDD ON 3.3V Use when VDD is less than 3.8V (VDD=�.�V~3.8V) |
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