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HT45F75 Datasheet(PDF) 125 Page - Holtek Semiconductor Inc |
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HT45F75 Datasheet(HTML) 125 Page - Holtek Semiconductor Inc |
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125 / 190 page ![]() Rev. 1.10 1�� De�e��e� 1�� �01� Rev. 1.10 1�5 De�e��e� 1�� �01� HT45F75 Body Fat Scale Flash MCU HT45F75 Body Fat Scale Flash MCU St ar t Wr it e Sl av e Ad dr es s to S IM A SE T SI M[ 2: 0] =1 10 SE T SI ME N I 2 C Bu s In te rr upt =? Ye s No Se t S IE a nd M Fn E Wa it fo r In te rru pt Go to M ai n Pr ogr am Cl r SI E Po ll S IF t o de ci de wh en t o go t o I 2 C Bu s IS R Go to M ai n Pr ogr am I2C Bus Initialisation Flow Chart I2C Bus Start Signal TheSTARTsignalcanonlybegeneratedbythemasterdeviceconnectedtotheI2Cbusandnotby theslavedevice.ThisSTARTsignalwillbedetectedbyalldevicesconnectedtotheI2Cbus.When detected,thisindicatesthattheI2CbusisbusyandthereforetheHBBbitwillbeset.ASTART conditionoccurswhenahightolowtransitionontheSDAlinetakesplacewhentheSCLline remainshigh. Slave Address ThetransmissionofaSTARTsignalbythemasterwillbedetectedbyalldevicesontheI2Cbus. Todeterminewhichslavedevicethemasterwishestocommunicatewith,theaddressoftheslave devicewillbesentoutimmediatelyfollowingtheSTARTsignal.Allslavedevices,afterreceiving this7-bitaddressdata,willcompareitwiththeirown7-bitslaveaddress.Iftheaddresssentoutby themastermatchestheinternaladdressofthemicrocontrollerslavedevice,thenaninternalI2Cbus interruptsignalwillbegenerated.Thenextbitfollowingtheaddress,whichisthe8thbit,defines theread/writestatusandwillbesavedtotheSRWbitoftheSIMC1register.Theslavedevicewill thentransmitanacknowledgebit,whichisalowlevel,asthe9thbit.Theslavedevicewillalsoset thestatusflagHAASwhentheaddressesmatch. AsanI2Cbusinterruptcancomefromtwosources,whentheprogramenterstheinterrupt subroutine,theHAASbitshouldbeexaminedtoseewhethertheinterruptsourcehascomefrom amatchingslaveaddressorfromthecompletionofadatabytetransfer.Whenaslaveaddressis matched,thedevicemustbeplacedineitherthetransmitmodeandthenwritedatatotheSIMD register,orinthereceivemodewhereitmustimplementadummyreadfromtheSIMDregisterto releasetheSCLline. I2C Bus Read/Write Signal TheSRWbitintheSIMC1registerdefineswhethertheslavedevicewishestoreaddatafromthe I2CbusorwritedatatotheI2Cbus.Theslavedeviceshouldexaminethisbittodetermineifitisto beatransmitterorareceiver.IftheSRWflagis“1”thenthisindicatesthatthemasterdevicewishes toreaddatafromtheI2Cbus,thereforetheslavedevicemustbesetuptosenddatatotheI2Cbusas atransmitter.IftheSRWflagis“0”thenthisindicatesthatthemasterwishestosenddatatotheI2C bus,thereforetheslavedevicemustbesetuptoreaddatafromtheI2Cbusasareceiver. |
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