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WM8950 Datasheet(PDF) 33 Page - Cirrus Logic

Part # WM8950
Description  ADC with Microphone Input and Programmable Digital Filters
PDF  60 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

WM8950 Datasheet(HTML) 33 Page - Cirrus Logic

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WM8950
Rev 4.5
33
Input
Signal
Output
of PGA
ALCLVL
PGA
Gain
NGTH
Figure 17 Noise Gate Operation
GRAPHIC EQUALISER
A 5-band graphic EQ is provided, which can be applied to the ADC data under control of the
EQMODE register bit.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R18
EQ Control 1
8
EQMODE
1
0 = Equaliser applied to ADC data
1 = Equaliser bypassed
Table 23 EQ Select
The equaliser consists of low and high frequency shelving filters (Band 1 and 5) and three peak filters
for the centre bands. Each has adjustable cut-off or centre frequency, and selectable boost (+/- 12dB
in 1dB steps). The peak filters have selectable bandwidth.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R18
EQ Band 1
4:0
EQ1G
01100
(0dB)
Band 1 Gain Control. See Table 29 for
details.



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