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TMS320DM6431 Datasheet(PDF) 173 Page - Texas Instruments

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Part # TMS320DM6431
Description  Digital Media Processor
PDF  227 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TMS320DM6431 Datasheet(HTML) 173 Page - Texas Instruments

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6.11 Universal Asynchronous Receiver/Transmitter (UART)
6.11.1 UART Peripheral Register Description(s)
TMS320DM6431
Digital Media Processor
www.ti.com
SPRS342C – NOVEMBER 2006 – REVISED JUNE 2008
The DM6431 device has one UART peripheral (UART0). UART0 has the following features:
• 16-byte storage space for both the transmitter and receiver FIFOs
• 1, 4, 8, or 14 byte selectable receiver FIFO trigger level for autoflow control and DMA
• DMA signaling capability for both received and transmitted data
• Programmable auto-rts and auto-cts for autoflow control
• Frequency pre-scale values from 1 to 65,535 to generate appropriate baud rates
• Prioritized interrupts
• Programmable serial data formats
–
5, 6, 7, or 8-bit characters
–
Even, odd, or no parity bit generation and detection
–
1, 1.5, or 2 stop bit generation
• False start bit detection
• Line break generation and detection
• Internal diagnostic capabilities
–
Loopback controls for communications link fault isolation
–
Break, parity, overrun, and framing error simulation
• Modem control functions (CTS, RTS)
The UART0 registers are listed in Table 6-35.
Table 6-35. UART0 Register Descriptions
HEX ADDRESS RANGE
ACRONYM
REGISTER NAME
0x01C2 0000
RBR
UART0 Receiver Buffer Register (Read Only)
0x01C2 0000
THR
UART0 Transmitter Holding Register (Write Only)
0x01C2 0004
IER
UART0 Interrupt Enable Register
0x01C2 0008
IIR
UART0 Interrupt Identification Register (Read Only)
0x01C2 0008
FCR
UART0 FIFO Control Register (Write Only)
0x01C2 000C
LCR
UART0 Line Control Register
0x01C2 0010
MCR
UART0 Modem Control Register
0x01C2 0014
LSR
UART0 Line Status Register
0x01C2 0018
-
Reserved
0x01C2 001C
-
Reserved
0x01C2 0020
DLL
UART0 Divisor Latch (LSB)
0x01C2 0024
DLH
UART0 Divisor Latch (MSB)
0x01C2 0028
PID1
Peripheral Identification Register 1
0x01C2 002C
PID2
Peripheral Identification Register 2
0x01C2 0030
PWREMU_MGMT
UART0 Power and Emulation Management Register
0x01C2 0034 - 0x01C2 03FF
-
Reserved
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Peripheral Information and Electrical Specifications
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