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RT5509WSC Datasheet(PDF) 16 Page - Richtek Technology Corporation |
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RT5509WSC Datasheet(HTML) 16 Page - Richtek Technology Corporation |
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16 / 58 page  RT5509 Copyright © 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation www.richtek.com DS5509-00 August 2017 16 VDDD, VBAT PWDN (I 2 C) BCK (I 2 S) AMPE (I 2 C) SPKE (I 2 C) I2SDIS, I2SFS (I 2 C) (SUSP) PWDN Amp Output OP ramp up Figure 7. Power ON Sequence VDDD, VBAT PWDN (I 2 C) AMPE (I 2 C) (MUTE) PWDN Amp Output w/o Mute OP OFF Amp Output w/i Mute Figure 8. Power OFF Sequence I 2S Mode Change without PWDN Suspend mode is detected if the clock source from I2S is not valid according to the value of I2SDF/I2SFS. In this case, soft muting is implemented before entering suspend mode. In the opposite situation, if the clock source from I2S is detected valid again, signal ramp up is implemented at the start after it enters the operating mode. The above procedure is shown in Figure 9. BCK (I 2 S) SUSP OP Amp Output OP ramp down ramp up Figure 9. I2S Mode Change without PWDN |
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