X9530 datasheet(5/30 Pages) XICOR

5 / 30 page

X9530

Characteristics subject to change without notice.

5 of 30

REV 3.7 8/26/04

www.xicor.com

Figure 1. Control and Status Register Format

Byte

MSB

LSB

80h

Control 0

BL1

BL0

I1DS

NV1234

I2DS

ADCfiltOff

ADCIN

VRM

Non-Volatile

81h

Control 1

Volatile or

Reserved

L1DA5

L1DA4

L1DA3

L1DA2

L1DA1

L1DA0

82h

Control 2

Volatile or

Reserved

L2DA5

L2DA4

L2DA3

L2DA2

L2DA1

L2DA0

83h

Control 3

Volatile or

D1DA7

D1DA6

D1DA5

D1DA4

D1DA3

D1DA2

D1DA1

D1DA0

Non-Volatile

84h

Control 4

Volatile or

D2DA7

D2DA6

D2DA5

D2DA4

D2DA3

D2DA2

D2DA1

D2DA0

Non-Volatile

85h

Control 5

Non-Volatile

D2DAS

L2DAS

D1DAS

L1DAS

I2FSO1

I2FSO0

I1FSO1

I1FSO0

86h

Control 6

Volatile

WEL

Reserved

Reserved Reserved

Reserved

87h

Status

Volatile

AD5

AD4

AD3

AD2

AD1

AD0

Reserved

Name

Address

Registers in byte addresses 88h through 8Fh are reserved.

Direct Access to LUT1

Direct Access to LUT2

Direct Access to DAC1

Direct Access to DAC2

ADC Output

I1 and I2 Direction

0: Source

1: Sink

Control

1, 2, 3, 4

Volatility

0: Volatile

1: Non-

volatile

ADC Input

0: Internal

1: External

Voltage

Block Lock

Reference

Mode

0: Internal

1: External

00: None Locked

01: GPM Locked

10: GPM, LUT1, Locked

11: GPM, LUT1, LUT2

Locked

Direct

Access

to DAC2

0: Disabled

1: Enabled

Direct

R2 Selection

Access

to LUT2

0: Disabled

1: Enabled

Access

to DAC1

Access

to LUT1

0: Disabled 0: Disabled

1: Enabled

00: External

01: Low Internal

10: Middle Internal

11: High Internal

R1 Selection

00: External

01: Low Internal

10: Middle Internal

11: High Internal

Write

Enable

Latch

0: Write

Disabled

1: Write

Enabled

ADC

0: On

1: Off

filtering

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