LAN91C100FD datasheet(19/79 Pages) SMSC

19 / 79 page

FEAST Fast Ethernet Controller with Full Duplex Capability

SMSC DS – LAN91C100FD Rev. D

Page 19

Rev. 10/14/2002

PRELIMINARY

Chapter 5 Data Structures and Registers

5.1

Packet Format in Buffer Memory

The packet format in memory is similar for the Transmit and Receive areas. The first word is reserved for

the status word. The next word is used to specify the total number of bytes, and it is followed by the data

area. The data area holds the packet itself.

Figure 5.1 - Data Packet Format

TRANSMIT PACKET

RECEIVE PACKET

STATUS WORD

Written by CSMA upon transmit

completion (see Status Register)

Written by CSMA upon receive

completion (see RX Frame

Status Word)

BYTE COUNT

Written by CPU

Written by CSMA

DATA AREA

Written/modified by CPU

Written by CSMA

CONTROL BYTE

Written by CPU to control

odd/even data bytes

Written by CSMA; also has

odd/even bit

BYTE COUNT - Divided by two, it defines the total number of words including the STATUS WORD, the

BYTE COUNT WORD, the DATA AREA and the CONTROL BYTE.

The receive byte count always appears as even; the ODDFRM bit of the receive status word indicates if the

low byte of the last word is relevant.

bit15

bit0

RAM OFFSET

(decimal)

2046 max

STATUS

WORD

reserved

BYTE

COUNT

DATA AREA

CONTROL BYTE

LAST DATA BYTE if odd

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