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BF1206 Datasheet(PDF) 9 Page - NXP Semiconductors |
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BF1206 Datasheet(HTML) 9 Page - NXP Semiconductors |
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9 / 21 page ![]() 2003 Nov 17 9 Philips Semiconductors Product specification Dual N-channel dual-gate MOS-FET BF1206 handbook, halfpage 02 VG2-S(V) IG1 ( µA) 46 50 0 40 30 20 1 MLE264 (1) (2) (3) (4) (5) Fig.11 Gate 1 current as a function of gate 2 voltage; typical values; amplifier a. VDS 5 V; Tj =25 °C. RG1 =91kΩ (connected to VGG); see Fig.35. (1) VGG =5V. (2) VGG = 4.5 V. (3) VGG =4V. (4) VGG = 3.5 V. (5) VGG =3V. handbook, halfpage 010 50 120 110 90 80 100 20 gain reduction (dB) Vunw (dB µV) 30 40 MLE266 Fig.12 Unwanted voltage for 1% cross-modulation as a function of gain reduction; typical values; amplifier a. VDS = 5 V; VGG = 5 V; RG1 =91kΩ; f = 50 MHz; f unw = 60 MHz; Tamb =25 °C; see Fig.35. handbook, halfpage 01 2 VAGC (V) gain reduction (dB) 4 0 −50 −10 3 −20 −30 −40 MLE265 Fig.13 Typical gain reduction as a function of AGC voltage; typical values; amplifier a. VDS = 5 V; VGG = 5 V; RG1 =91kΩ; f = 50 MHz; Tamb =25 °C; see Fig.35. handbook, halfpage 050 24 0 8 16 10 ID (mA) gain reduction (dB) 20 30 40 MLE267 Fig.14 Drain current as a function of gain reduction; typical values; amplifier a. VDS = 5 V; VGG = 5 V; RG1 =91kΩ; f = 50 MHz; Tamb =25 °C; see Fig.35. |
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