AD4007 datasheet(17/38 Pages) AD

17 / 38 page

Data Sheet

AD4003/AD4007/AD4011

Rev. B | Page 17 of 38

THEORY OF OPERATION

COMP

CONTROL

LOGIC

SWITCHES CONTROL

BUSY

OUTPUT CODE

CNV

65,536C

131,072C

LSB

SW+

MSB

LSB

SW–

MSB

65,536C

131,072C

IN+

REF

GND

IN–

Figure 31. ADC Simplified Schematic

CIRCUIT INFORMATION

The AD4003/AD4007/AD4011 are high speed, low power,

single-supply, precise, 18-bit ADCs based on a SAR architecture.

The AD4003 is capable of converting 2,000,000 samples per

second (2 MSPS), the AD4007 is capable of converting 1,000,000

samples per second (1 MSPS), and the AD4011 is capable of

converting 500,000 samples per second (500 kSPS). The power

consumption of the AD4003/AD4007/AD4011 scales with

throughput, because they power down in between conversions.

When operating at 10 kSPS, for example, they typically

consume 80 μW, making them ideal for battery-powered

applications. The AD4003/ AD4007/AD4011 also have a valid

first conversion after being powered down for long periods,

which can further reduce power consumed in applications in

which the ADC does not need to be constantly converting.

The AD4003/AD4007/AD4011 provide the user with an

on-chip, track-and-hold and do not exhibit any pipeline delay

or latency, making them ideal for multiplexed applications.

The AD4003/AD4007/AD4011 incorporate a multitude of

unique ease of use features that result in a lower system power

and footprint.

The AD4003/AD4007/AD4011 each have an internal voltage

clamp that protects the device from overvoltage damage on the

analog inputs.

The analog input incorporates circuitry that reduces the nonlinear

charge kickback seen from a typical switched capacitor SAR input.

This reduction in kickback, combined with a longer acquisition

phase, means reduced settling requirements on the driving

amplifier. This combination allows the use of lower bandwidth

and lower power amplifiers as drivers. It has the additional benefit

of allowing a larger resistor value in the input RC filter and a

corresponding smaller capacitor, which results in a smaller RC

load for the amplifier, improving stability and power dissipation.

High-Z mode can be enabled via the SPI interface by programming

a register bit (see Table 14). When high-Z mode is enabled, the

ADC input has a low input charging current at low input signal

frequencies as well as improved distortion over a wide frequency

range up to 100 kHz. For frequencies greater than 100 kHz and

multiplexing, disable high-Z mode.

For single-supply applications, a span compression feature

creates additional headroom and footroom for the driving

amplifier to access the full range of the ADC.

The fast conversion time of the AD4003/AD4007/AD4011, along

with turbo mode, allows low clock rates to read back conversions,

even when running at their respective maximum throughput

rates. Note that for the AD4003, the full throughput rate of

2 MSPS can be achieved only with turbo mode enabled.

The AD4003/AD4007/AD4011 can interface with any 1.8 V to 5 V

digital logic family. They are available in a 10-lead MSOP or a tiny

10-lead LFCSP that allows space savings and flexible configura-

tions.

The AD4003/AD4007/AD4011 are pin for pin compatible

with some of the 14-/16-/18-/20-bit precision SAR ADCs listed

in Table 8.

Table 8. MSOP, LFCSP 14-/16-/18-/20-Bit Precision SAR ADCs

Bits 100 kSPS

250 kSPS

400 kSPS to

500 kSPS

≥1000 kSPS

201

AD40202

181

AD7989-12

AD76912

AD76902,

AD7989-52

AD40032,

AD79822,

AD79842,

AD40072,

AD40112

161

AD7684

AD76872

AD76882,

AD76932,

AD79162

AD4001,

AD4005,

AD79152

163

AD7680,

AD7683,

AD7988-12

AD76852,

AD7694

AD76862,

AD7988-52

AD40082

AD40002,

AD40042,

AD79802,

AD7983

143

AD7940

AD79422

AD79462

Not applicable

1 True differential.

2 Pin for pin compatible.

3 Pseudo differential.

AD4007 Datasheet(PDF) 17 Page - Analog Devices

AD4007 Datasheet(HTML) 17 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38

Datasheet Download

Link URL