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AD7175-2 Datasheet(PDF) 21 Page - Analog Devices |
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AD7175-2 Datasheet(HTML) 21 Page - Analog Devices |
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21 / 63 page ![]() AD7175-2 Data Sheet Rev. B | Page 20 of 62 GETTING STARTED The AD7175-2 offers the user a fast settling, high resolution, multiplexed ADC with high levels of configurability. Two fully differential or four single-ended analog inputs. Crosspoint multiplexer selects any analog input combina- tion as the input signals to be converted, routing them to the modulator positive or negative input. True rail-to-rail buffered analog and reference inputs. Fully differential input or single-ended input relative to any analog input. Per channel configurability—up to four different setups can be defined. A separate setup can be mapped to each of the channels. Each setup allows the user to configure whether the buffers are enabled or disabled, gain and offset correction, filter type, output data rate, and reference source selection (internal/external). The AD7175-2 includes a precision 2.5 V low drift (±2 ppm/°C) band gap internal reference. This reference can used for the ADC conversions, reducing the external component count. Alternatively, the reference can be output to the REFOUT pin to be used as a low noise biasing voltage for external circuitry. An example of this is using the REFOUT signal to set the input common mode for an external amplifier. The AD7175-2 includes two separate linear regulator blocks for both the analog and digital circuitry. The analog LDO regulates the AVDD2 supply to 1.8 V, supplying the ADC core. The user can tie the AVDD1 and AVDD2 supplies together for easiest connection. If there is already a clean analog supply rail in the system in the range of 2 V (minimum) to 5.5 V (maximum), the user can also choose to connect this to the AVDD2 input, allowing lower power dissipation. DGND AD7175-2 IOVDD CS SYNC/ERROR SYNC/ERROR REGCAPD REFOUT AVSS 0.1µF REGCAPA AVDD2 AVDD1 XTAL1 GPIO1 4 2 3 1 24 23 22 21 19 20 9 10 11 12 13 14 15 16 17 18 7 8 5 6 6 8 5 3 1 4 7 2 REF– REF+ 2.5V REFERENCE OUTPUT 4.7µF 0.1µF 0.1µF VOUT GND NC VIN 0.1µF 4.7µF VIN 0.1µF ADR445BRZ IOVDD AVDD2 0.1µF AVDD1 0.1µF CX1 16MHz CX2 0.1µF 1µF 0.1µF 1µF GENERAL-PURPOSE I/O 0 AND GENERAL-PURPOSE I/O 1 OUTPUT HIGH = AVDDx OUTPUT LOW = AVSS OPTIONAL EXTERNAL CRYSTAL CIRCUITRY CAPACITORS GPIO0 CLKIN OPTIONAL EXTERNAL CLOCK INPUT AIN0 AIN1 AIN2 AIN3 AIN4 GPIO0 GPIO1 XTAL2/CLKI0 DOUT/RDY DIN SCLK CS DOUT/RDY DIN SCLK 0.1µF Figure 44. Typical Connection Diagram |
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