AD7175-2 datasheet(29/63 Pages) AD

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AD7175-2

Data Sheet

Rev. B | Page 28 of 62

CIRCUIT DESCRIPTION

BUFFERED ANALOG INPUT

The AD7175-2 has true rail-to-rail, integrated, precision unity

gain buffers on both ADC analog inputs. The buffers provide

the benefit of giving the user high input impedance with only

30 nA typical input current, allowing high impedance sources

to be connected directly to the analog inputs. The buffers fully

drive the internal ADC switch capacitor sampling network,

simplifying the analog front-end circuit requirements while

consuming a very efficient 2.9 mA typical per buffer. Each analog

input buffer amplifier is fully chopped, meaning that it minimizes

the offset error drift and 1/f noise of the buffer. The 1/f noise

profile of the ADC and buffer combined is shown in Figure 53.

–250

–200

–150

–100

–50

0.1

100

10k

FREQUENCY (Hz)

Figure 53. Shorted Input FFT (Analog Input Buffers Enabled)

The analog input buffers do not suffer from linearity

degradation when operating at the rails, unlike many discrete

amplifiers. When operating at or close to the AVDD1 and AVSS

supply rails, there is an increase in input current. This increase

is most notable at higher temperatures. Figure 42 and Figure 43

show the input current for various conditions. With the analog

input buffers disabled, the average input current to the AD7175-2

changes linearly with the differential input voltage at a rate of

48 µA/V.

CROSSPOINT MULTIPLEXER

There are five analog input pins: AIN0, AIN1, AIN2, AIN3, and

AIN4. Each of these pins connects to the internal crosspoint

multiplexer. The crosspoint multiplexer enables any of these inputs

to be configured as an input pair, either single-ended or fully

differential. The AD7175-2 can have up to four active channels.

When more than one channel is enabled, the channels are

automatically sequenced in order from the lowest enabled channel

number to the highest enabled channel number. The output of

the multiplexer is connected to the input of the integrated true

rail-to-rail buffers. These can be bypassed and the multiplexer

output can be directly connected to the switched-capacitor input

of the ADC. The simplified analog input circuit is shown in

Figure 54.

AIN0

AIN1

AVDD1

AVSS

AVDD1

AVSS

AIN2

AVDD1

AIN4

AVDD1

AIN3

AVDD1

AVSS

Ø1

CS1

CS2

+IN

–IN

Ø2

Ø1

Figure 54. Simplified Analog Input Circuit

The CS1 and CS2 capacitors have a magnitude in the order of a

number of picofarads each. This capacitance is the combination

of both the sampling capacitance and the parasitic capacitance.

Fully Differential Inputs

Because the AIN0 to AIN4 analog inputs are connected to a

crosspoint multiplexer, any combination of signals can create an

analog input pair. This allows the user to select two fully

differential inputs or four single-ended inputs.

If two fully differential input paths are connected to the AD7175-2,

using AIN0/AIN1 as one differential input pair and AIN2/AIN3

as the second differential input pair is recommended. This is

due to the relative locations of these pins to each other. Decouple all

analog inputs to AVSS.

Single-Ended Inputs

The user can also choose to measure four different single-ended

analog inputs. In this case, each of the analog inputs is converted

as the difference between the single-ended input to be

measured and a set analog input common pin. Because there is

a crosspoint multiplexer, the user can set any of the analog inputs

as the common pin. An example of such a scenario is to connect

the AIN4 pin to AVSS or to the REFOUT voltage (that is, AVSS

+ 2.5 V) and select this input when configuring the crosspoint

multiplexer. When using the AD7175-2 with single-ended

inputs, the INL specification is degraded.

AD7175-2 Datasheet(PDF) 29 Page - Analog Devices

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