LTC3416 datasheet(14/16 Pages) LINER

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LTC3416

3416f

APPLICATIO S I FOR ATIO

Figure 7. LTC3416 Layout Diagram

(7a) Top Layer

(7b) Bottom Layer

PC Board Layout Checklist

When laying out the printed circuit board, the following

checklist should be used to ensure proper operation of the

LTC3416. Check the following in your layout.

1. A ground plane is recommended. If a ground plane layer

is not used, the signal and power grounds should be

segregated with all small-signal components returning

to the SGND pin at one point which is then connected to

the PGND pin close to the LTC3416.

2. Connect the (+) terminal of the input capacitor(s), CIN,

as close as possible to the PVIN pin. This capacitor

provides the AC current into the internal power MOSFETs.

3. Keep the switching node, SW, away from all sensitive

small-signal nodes.

4. Flood all unused areas on all layers with copper. Flood-

ing with copper will reduce the temperature rise of

power components. You can connect the copper areas

to any DC net (PVIN, SVIN, VOUT, PGND, SGND or any

other DC rail in your system).

5. Connect the VFB pin directly to the feedback resistors.

The resistor divider must be connected between VOUT

and SGND.

3416 F07a

3416 F07b

LTC3416 Datasheet(PDF) 14 Page - Linear Technology