Data Sheet

ADT75

Rev. B | Page 17 of 24

WRITING DATA

Depending on the register being written to, there are two different

writes for the ADT75.

Writing to the Address Pointer Register for a

Subsequent Read

To read data from a particular register, the address pointer register

must contain the address of that register. If it does not, the correct

address must be written to the address pointer register by

performing a single-byte write operation, as shown in Figure 14.

The write operation consists of the serial bus address followed

by the address pointer byte. No data is written to any of the data

registers. A read operation is then performed to read the register.

Writing Data to a Register

The configuration register is 8-bits wide so only one byte of data

can be written to this register. Writing a single byte of data to

the configuration register consists of the serial bus address, the

data register address written to the address pointer register,

followed by the data byte written to the selected data register.

are each 16-bits wide, so two data bytes can be written into these

registers. Writing two bytes of data to either one of these

registers consists of the serial bus address, the data register

address written to the address pointer register, followed by the

two data bytes written to the selected data register. This is shown

in Figure 16. If more than the required number of data bytes is

written to a register then the register ignores these extra data

bytes. To write to a different register, another start or repeated

start is required.

SCL

SDA

1

1

0

0

1

A2

A1

A0

START BY

MASTER

FRAME 1

SERIAL BUS ADDRESS

BYTE

FRAME 2

ADDRESS POINTER REGISTER BYTE

STOP BY

MASTER

ACK. BY

ADT75

ACK. BY

ADT75

R/W

P7

P6

P5

P4

P3

P2

P1

P0

9

9

1

Figure 14. Writing to the Address Pointer Register to Select a Register for a Subsequent Read Operation

FRAME 1

SERIAL BUS ADDRESS BYTE

FRAME 2

ADDRESS POINTER REGISTER BYTE

ACK. BY

ADT75

ACK. BY

ADT75

ACK. BY

ADT75

STOP BY

MASTER

FRAME 3

DATA BYTE

SDA (CONTINUED)

SCL (CONTINUED)

SCL

SDA

START BY

MASTER

1

0

0

1

A2

A1

A0

P7

P6

P5

P4

P3

P2

P1

P0

9

D7

D6

D5

D4

D3

D2

D1

D0

R/W

1

9

1

9

1

Figure 15. Writing to the Address Pointer Register Followed by a Single Byte of Data to the Configuration Register