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AD7192 Datasheet(PDF) 4 Page - Analog Devices

Part # AD7192
Description  Sigma-Delta ADC with PGA
PDF  41 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD7192 Datasheet(HTML) 4 Page - Analog Devices

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AD7192
Rev. A | Page 3 of 40
SPECIFICATIONS
AVDD = 3 V to 5.25 V, DVDD = 2.7 V to 5.25 V, AGND = DGND = 0 V; REFINx(+) = AVDD, REFINx(−) = AGND, MCLK = 4.92 MHz,
TA = TMIN to TMAX, unless otherwise noted.
Table 1.
Parameter
AD7192B
Unit
Test Conditions/Comments1
ADC
Output Data Rate
4.7 to 4800
Hz nom
Chop disabled
1.17 to 1200
Hz nom
Chop enabled, sinc4 filter
1.56 to 1600
Hz nom
Chop enabled, sinc3 filter
No Missing Codes2
24
Bits min
FS > 1, sinc4 filter3
24
Bits min
FS > 4, sinc3 filter3
Resolution
See the RMS Noise and Resolution section
RMS Noise and Output Data Rates
See the RMS Noise and Resolution section
Integral Nonlinearity
Gain = 12
±10
ppm of FSR max
±2 ppm typical, AVDD = 5 V
±15
ppm of FSR max
±2 ppm typical, AVDD = 3 V
Gain > 1
±30
ppm of FSR max
±5 ppm typical, AVDD = 5 V
±30
ppm of FSR max
±12 ppm typical, AVDD = 3 V
Offset Error4, 5
±150/gain
μV typ
Chop disabled
±0.5
μV typ
Chop enabled
Offset Error Drift vs. Temperature
±150/gain
nV/°C typ
Gain = 1 to 16; chop disabled
±5
nV/°C typ
Gain = 32 to 128; chop disabled
±5
nV/°C typ
Chop enabled
Offset Error Drift vs. Time
25
nV/1000 hours typ
Gain > 32
Gain Error4
±0.001
% typ
AVDD = 5 V, gain = 1, TA = 25°C (factory
calibration conditions)
−0.39
% typ
Gain = 128, before full-scale calibration (see
Table 23)
±0.003
% typ
Gain > 1, after internal full-scale calibration,
AVDD ≥ 4.75 V.
±0.005
% typ
Gain > 1, after internal full-scale calibration,
AVDD < 4.75 V
Gain Drift vs. Temperature
±1
ppm/°C typ
Gain Drift vs. Time
10
ppm/1000 hours typ
Gain = 1.
Power Supply Rejection
90
dB typ
Gain = 1, VIN = 1 V.
95
dB min
Gain > 1, VIN = 1 V/gain, 110 dB typ.
Common-Mode Rejection
@ DC2
100
dB min
Gain = 1, VIN = 1 V.
@ DC
110
dB min
Gain > 1, VIN = 1 V/gain.
@ 50 Hz, 60 Hz2
120
dB min
10 Hz output data rate, 50 ± 1 Hz, 60 ± 1 Hz.
@ 50 Hz, 60 Hz2
120
dB min
50 ± 1 Hz (50 Hz output data rate), 60 ± 1 Hz
(60 Hz output data rate).
Normal Mode Rejection2
Sinc4 Filter
Internal Clock
@ 50 Hz, 60 Hz
100
dB min
10 Hz output data rate, 50 ± 1 Hz, 60 ± 1 Hz.
74
dB min
50 Hz output data rate, REJ606 = 1,
50 ± 1 Hz, 60 ± 1 Hz.
@ 50 Hz
96
dB min
50 Hz output data rate, 50 ± 1 Hz.
@ 60 Hz
97
dB min
60 Hz output data rate, 60 ± 1 Hz.



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