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AD7291

Data Sheet

Rev. C | Page 12 of 28

CIRCUIT INFORMATION

The AD7291 includes an 8-channel multiplexer, an on-chip

track-and-hold amplifier, an analog-to-digital converter (ADC),

an on-chip oscillator, internal data registers, an internal tempera-

ture sensor, and an I2C-compatible serial interface, all housed in

a 20-lead LFCSP. This package offers considerable space-saving

advantages over alternative solutions. The device can operate from

a single supply from 2.8 V to 3.6 V and offers 12 bits of resolution.

The AD7291 has eight single-ended input channels and an on-

chip ±12 ppm reference. The analog input range for the AD7921 is

0 V to VREF. The AD7291 includes a high accuracy band gap

temperature sensor, which is monitored and digitized by the 12-bit

ADC to give a resolution of 0.25°C.

The AD7291 typically remains in a partial power-down state

while not converting. When supplies are first applied, the device

powers up in a partial power-down state. Power-up is initiated

prior to a conversion, and the device returns to partial power-

down mode when the conversion is complete. Conversions can

be initiated by using the autocycle mode or command mode

where wake-up and a conversion occur during a write address

function. When the conversion is complete, the AD7291 again

enters partial power-down mode.

In command mode at the beginning of a read, the AD7291

wakes up completely, that is, becomes fully functional and

completes the conversion while the address is being read out. In

autocylce mode, conversions occur at 50 μs intervals; that is, the

AD7291 exits partial power-down mode and powers up fully at

50 μs intervals. This automatic partial power-down feature

allows power saving between conversions. Any read or write

operation across the I2C interface can occur while the device is

in partial power-down mode.

CONVERTER OPERATION

The AD7291 is a 12-bit successive approximation ADC based

around a capacitive DAC. Figure 18 and Figure 19 show simpli-

fied schematics of the ADC during the acquisition and conversion

phase, respectively. The ADC comprises control logic, SAR,

and a capacitive DAC that are used to add and subtract fixed

amounts of charge from the sampling capacitor to bring the

comparator back into a balanced condition. Figure 18 shows the

acquisition phase. SW2 is closed and SW1 is in Position A, the

comparator is held in a balanced condition, and the sampling

capacitor acquires the signal on the selected VIN channel.

CONTROL

LOGIC

CAPACITIVE

DAC

VIN

SW1

SW2

GND1

COMPARATOR

Figure 18. ADC Acquisition Phase

When the ADC starts a conversion (see Figure 19), SW2

opens and SW1 moves to Position B, causing the comparator

to become unbalanced. The control logic and the capacitive

DAC are used to add and subtract fixed amounts of charge to

bring the comparator back into a balanced condition. When the

comparator is rebalanced, the conversion is complete. The

control logic generates the ADC output code. Figure 21 shows

the transfer functions of the ADC.

CONTROL

LOGIC

CAPACITIVE

DACE

VIN

SW1

SW2

GND1

COMPARATOR

Figure 19. ADC Conversion Phase

ANALOG INPUT

Figure 20 shows an equivalent circuit of the analog input struc-

ture of the AD7291. The two diodes, D1 and D2, provide ESD

protection for the analog inputs. Care must be taken to ensure

that the analog input signal never exceeds the internally generated

LDO voltage of 2.5 V (DCAP) by more than 300 mV. This causes

the diodes to become forward biased and start conducting current

into the substrate. The maximum current these diodes can

conduct without causing irreversible damage to the device is

10 mA. Capacitor C1, in Figure 20, is typically about 8 pF and

can primarily be attributed to pin capacitance. Resistor R1 is a

lumped component made up of the on resistance of a switch (track-

and-hold switch) and the on resistance of the input multiplexer.

The total resistance is typically about 155 Ω. Capacitor C2 is the

ADC sampling capacitor and has a capacitance of 34 pF typically.

8pF

34pF

CONVERSION PHASE: SWITCH OPEN

TRACK PHASE: SWITCH CLOSED

DCAP (2.5V)

VIN

Figure 20. Equivalent Analog Input Circuit

For ac applications, removing high frequency components from

the analog input signal is recommended by using an RC low-pass

filter on the relevant analog input pin. In applications where

harmonic distortion and signal-to-noise ratios are critical, the

analog input must be driven from a low impedance source.

Large source impedances significantly affect the ac performance

of the ADC. This can necessitate the use of an input buffer

amplifier. The choice of the op amp is a function of the particular

application performance criteria.

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