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AD7291 Datasheet(PDF) 16 Page - Analog Devices |
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AD7291 Datasheet(HTML) 16 Page - Analog Devices |
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16 / 29 page ![]() Data Sheet AD7291 Rev. C | Page 15 of 28 INTERNAL REGISTER STRUCTURE The AD7291 contains 34 internal registers (see Figure 23) that are used to store conversion results, high and low conversion limits, and information to configure and control the device. There are 33 data registers and one address pointer register. Each data register has an address that the address pointer register points to when communicating with it. Table 9 details which registers are read, write, or read/write. ADDRESS POINTER REGISTER The address pointer register is the register to which the first data byte of every write operation is written automatically; therefore, this register does not have and does not require an address. The address pointer register is an 8-bit register in which the six LSBs are used as pointer bits to store an address that points to one of the AD7291 data registers. The first byte following each write address is to the address pointer register, containing the address of one of the data registers. The six LSBs select the data register to which subsequent data bytes are written. Only the six LSBs of this register are used to select a data register. During power-up, the address pointer register contains all 0s, pointing to the command register. Table 8. Address Pointer Register D1 D0 P5 P4 P3 P2 P1 P0 0 0 Register select SDA SCL COMMAND REGISTER TSENSE CONV RESULT REGISTER TSENSE AVG RESULT REGISTER CH0 DATAHIGH REGISTER CH1 DATALOW REGISTER CH0 HYSTERESIS REGISTER CH1 DATAHIGH REGISTER CH1 HYSTERESIS REGISTER CH0 DATALOW REGISTER CH7 DATAHIGH REGISTER CH7 DATALOW REGISTER CH7 HYSTERESIS REGISTER TSENSE HYSTERESIS REGISTER TSENSE DATAHIGH REGISTER TSENSE DATALOW REGISTER ALERT STATUS REGISTER A ALERT STATUS REGISTER B VOLTAGE CONV RESULT REGISTER SERIAL BUS INTERFACE ADDRESS POINTER REGISTER Figure 23. AD7291 Register Structure |
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