PD780133 datasheet(44/558 Pages) NEC

44 / 558 page

CHAPTER 2 PIN FUNCTIONS

User’s Manual U16228EJ2V0UD

2.2.14 RESET

This is the active-low system reset input pin.

2.2.15 REGC

This is the pin for connecting the capacitor for the regulator. When using the regulator, connect this pin to VSS via a

capacitor (1

µF: recommended). When the regulator is not used, connect this pin directly to VDD pin.

Caution

A regulator cannot be used with (A1) grade products and (A2) grade products.

Be sure to

connect the REGC pin of these products directly to VDD.

2.2.16 X1 and X2

These are the pins for connecting a resonator for X1 input clock.

When supplying an external clock, input a signal to the X1 pin and input the inverse signal to the X2 pin.

2.2.17 XT1 and XT2

These are the pins for connecting a resonator for subsystem clock.

When supplying an external clock, input a signal to the XT1 pin and input the inverse signal to the XT2 pin.

2.2.18 VDD and EVDD

VDD is the positive power supply pin for other than ports.

EVDD is the positive power supply pin for ports.

2.2.19 VSS and EVSS

VSS is the ground potential pin for other than ports.

EVSS is the ground potential pin for ports.

2.2.20 VPP (flash memory versions only)

This is a pin for flash memory programming mode setting and high-voltage application for program write/verify.

Connect to EVSS or VSS in the normal operation mode.

2.2.21 IC (mask ROM versions only)

The IC (Internally Connected) pin is provided to set the test mode to check the 78K0/KE1 at shipment. Connect it

directly to EVSS or VSS pin with the shortest possible wire in the normal operation mode.

When a potential difference is produced between the IC pin and the EVSS or VSS pin because the wiring between

these two pins is too long or external noise is input to the IC pin, the user’s program may not operate normally.

• Connect the IC pin directly to EVSS or VSS.

As short as possible

EVSS or VSS

PD780133 Datasheet(PDF) 44 Page - NEC