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PD780133 Datasheet(PDF) 80 Page - NEC |
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PD780133 Datasheet(HTML) 80 Page - NEC |
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80 / 558 page  CHAPTER 3 CPU ARCHITECTURE User’s Manual U16228EJ2V0UD 80 3.3.3 Table indirect addressing [Function] Table contents (branch destination address) of the particular location to be addressed by bits 1 to 5 of the immediate data of an operation code are transferred to the program counter (PC) and branched. This function is carried out when the CALLT [addr5] instruction is executed. This instruction references the address stored in the memory table from 40H to 7FH, and allows branching to the entire memory space. [Illustration] 15 1 15 0 PC 70 Low Addr. High Addr. Memory (Table) Effective address+1 Effective address 01 00000000 87 87 65 0 0 1 11 76 5 1 0 ta4–0 Operation code 3.3.4 Register addressing [Function] Register pair (AX) contents to be specified with an instruction word are transferred to the program counter (PC) and branched. This function is carried out when the BR AX instruction is executed. [Illustration] 70 rp 07 AX 15 0 PC 87 |
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