AD5662ARM datasheet(12/20 Pages) AD

12 / 20 page

AD5662

Preliminary Technical Data

Rev. PrA | Page 12 of 20

SAMPLE NUMBER

2.500400

2.500300

2.500200

2.500100

2.500000

2.499900

2.499800

2.499700

2.499600

2.499500

2.499400

2.499300

2.499200

2.499100

VDD = VREF = 5V

TA = 25°C

13nS/SAMPLE NUMBER

1 LSB CHANGE AROUND

MIDSCALE (7FFFh

→ 8000h)

GLITCH IMPULSE = 1.271nV.s

150 200

250

100

300

350

400

450

500 550

Figure 22. Digital-to-Analog Glitch Impulse (Positive)

SAMPLE NUMBER

2.500250

2.500200

2.500150

2.500100

2.500050

2.500000

2.499950

2.499900

2.499850

2.499800

2.499750

2.499700

2.499650

2.499600

150 200

250

100

300

350

400

450

500 550

VDD = VREF = 5V

TA = 25°C

20nS/SAMPLE NUMBER

DAC LOADED WITH MIDSCALE

DIGITAL FEEDTHROUGH = 0.06nV.s

Figure 23. Digital Feedthrough

–20

–50

–80

–30

–40

–60

–70

–90

–100

10k

VDD = 5V

TA = 25°C

DAC LOADED WITH FULLSCALE

VREF = 2V ± 0.3Vp-p

Figure 24. Total Harmonic Distortion

CAPACITANCE (nF)

810

VREF = VDD

TA = 25°C

VDD = 5V

VDD = 3V

Figure 25. Settling Time vs. Capacitive Load

Y AXIS = 2

µV/DIV

X AXIS = 4s/DIV

VDD = VREF = 5V

TA = 25°C

DAC LOADED WITH MIDSCALE

Figure 26. 0.1 Hz to 10 Hz Output Noise Plot

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