AD7674ASTZ datasheet(20/29 Pages) AD

20 / 29 page

Data Sheet

AD7674

Rev. B | Page 19 of 28

For instance, for a driver with an equivalent input noise of

2 nV/√Hz (for example, the AD8021) configured as a buffer,

thus with a noise gain of +1, the SNR degrades by only 0.34 dB

with the filter in Figure 28, and by 1.8 dB without it.

•

The driver needs to have a THD performance suitable to

that of the AD7674.

The AD8021 meets these requirements and is usually appropriate

for almost all applications. The AD8021 needs a 10 pF external

compensation capacitor, which should have good linearity as an

NPO ceramic or mica type.

The AD8022 can be used if a dual version is needed and gain of

1 is present. The AD829 is an alternative in applications where

high frequency (above 100 kHz) performance is not required. In

gain of 1 applications, it requires an 82 pF compensation capacitor.

The AD8610 is another option when low bias current is needed

in low frequency applications.

Single-to-Differential Driver

For applications using unipolar analog signals, a single-ended-

to-differential driver allows for a differential input into the device.

The schematic is shown in Figure 32. When provided an input

signal of 0 to VREF, this configuration produces a differential

±VREF with midscale at VREF/2.

If the application can tolerate more noise, the AD8138

differential driver can be used.

8.25k

Ω

2.5V

AD8021

590

Ω

AD7674

IN+

IN– REF

ANALOG INPUT

(UNIPOLAR

0V TO 4.096V)

10pF

AD8021

590

Ω

10pF

µF

100nF

1.82k

Ω

2.7nF

Ω

2.7nF

Ω

REFBUFIN

03083-0-031

Figure 32. Single-Ended-to-Differential Driver Circuit

(Internal Reference Buffer Used)

Voltage Reference

The AD7674 allows the use of an external voltage reference

either with or without the internal reference buffer.

Using the internal reference buffer is recommended when

sharing a common reference voltage between multiple ADCs is

desired.

However, the advantages of using the external reference voltage

directly are:

•

The SNR and dynamic range improvement (about 1.7 dB)

resulting from the use of a reference voltage very close to

the supply (5 V) instead of a typical 4.096 V reference

when the internal buffer is used.

•

The power saving when the internal reference buffer is

powered down (PDBUF High)

To use the internal reference buffer, PDBUF should be LOW. A

2.5 V reference voltage applied on the REFBUFIN input results

in a 4.096 V reference on the REF pin.

In both cases, the voltage reference input REF has a dynamic

input impedance and therefore requires an efficient decoupling

between REF and REFGND inputs, The decoupling consists of

a low ESR 47 µF tantalum capacitor connected to the REF and

REFGND inputs with minimum parasitic inductance.

Care should also be taken with the reference temperature

coefficient of the voltage reference, which directly affects the

full-scale accuracy if this parameter matters. For instance, a

±4 ppm/°C temperature coefficient of the reference changes the

full scale by ±1 LSB/°C.

Power Supply

The AD7674 uses three sets of power supply pins: an analog 5 V

supply (AVDD), a digital 5 V core supply (DVDD), and a digital

output interface supply (OVDD). The OVDD supply defines

the output logic level and allows direct interface with any logic

working between 2.7 V and DVDD + 0.3 V. To reduce the

number of supplies needed, the digital core (DVDD) can be

supplied through a simple RC filter from the analog supply, as

shown in Figure 28. The AD7674 is independent of power

supply sequencing once OVDD does not exceed DVDD by

more than 0.3 V, and is therefore free from supply voltage

induced latch-up. Additionally, it is very insensitive to power

supply variations over a wide frequency range, as shown in

Figure 33.

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