AD7723 datasheet(23/33 Pages) AD

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AD7723

Rev. C | Page 22 of 32

Ω

XTAL

CLKIN

AD7723

In all cases, since the REF2 voltage connects to the analog

modulator, a 220 nF and 10 nF capacitor must connect directly

from REF2 to AGND. The external capacitor provides the

charge required for the dynamic load presented at the REF2 pin

(see Figure 41).

10nF

220nF

4pF

REF2

SWITCHED-CAP

DAC REFERENCED

CLKIN

ΦΦ

Figure 43. Crystal Oscillator Connection

When an external clock source is being used, the internal

oscillator circuit can be disabled by tying XTAL_OFF high. A

low phase noise clock should be used to generate the ADC

sampling clock because sampling clock jitter effectively

modulates the input signal and raises the noise floor. The

sampling clock generator should be isolated from noisy digital

circuits, grounded, and heavily decoupled to the analog ground

plane.

Figure 41. REF2 Equivalent Input Circuit

The AD780 is ideal to use as an external reference with the

AD7723. Figure 42 shows a suggested connection diagram.

Grounding Pin 8 on the AD780 selects the 3 V output mode.

The sampling clock generator should be referenced to the

analog ground in a split ground system. However, this is not

always possible because of system constraints. In many

applications, the sampling clock must be derived from a higher

frequency multipurpose system clock that is generated on the

digital ground plane. If the clock signal is passed between its

origin on a digital ground plane to the AD7723 on the analog

ground plane, the ground noise between the two planes adds

directly to the clock and produces excess jitter. The jitter can

cause degradation in the signal-to-noise ratio and also produce

unwanted harmonics. This can be remedied somewhat by

transmitting the sampling signal as a differential one, using

either a small RF transformer or a high speed differential driver

and a receiver such as PECL. In either case, the original master

system clock should be generated from a low phase noise crystal

oscillator.

AD780

AD7723

REF2

REF1

µ F

22nF

220nF

10nF

µ F

+VIN

TEMP

GND

O/P

SELECT

VOUT

TRIM

2.5V

NC = NO CONNECT

Figure 42. External Reference Circuit Connection

CLOCK GENERATION

The AD7723 contains an oscillator circuit to allow a crystal or

an external clock signal to generate the master clock for the

ADC. The connection diagram for use with a crystal is shown

in Figure 43. Consult the manufacturer’s recommendation for

the load capacitors. To enable the oscillator circuit on board the

AD7723, XTAL_OFF should be tied low.

AD7723 Datasheet(PDF) 23 Page - Analog Devices

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