AD9670EBZ datasheet(37/53 Pages) AD

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AD9670

Data Sheet

Rev. A | Page 36 of 52

Field

Bits

Description

Decimation factor

M = N − 1, where N = decimation factor

0x00: decimate by 1 (no decimation, filtering only)

0x01: decimate by 2

0x02: decimate by 3

…

0x1F: decimate by 32

Digital gain compensation

Gain = 2

000: gain = 1 (no shift)

001: gain = 2 (shift by 1)

010: gain = 4 (shift by 2)

…

111: gain = 128 (shift by 7)

HPF Bypass

Digital high-pass filter (HPF) bypass

0 = disable (filter enabled)

1 = enable (filter bypassed)

POWER_START

ADC clock counted from TX_TRIG1 signal assertion when the active channels are powered up

Reserved

POWER_STOP

ADC clock counted from TX_TRIG1 signal assertion when the active channels are powered down

1 TX_TRIG indicates the differential signal created via the TX_TRIG− pin and the TX_TRIG+ pin.

RF DECIMATOR

The input to the RF decimator is either the ADC output data or

a test waveform described in the Digital Test Waveforms section.

The test waveforms are enabled per channel in Register 0x11A

(see Table 27).

DC Offset Calibration

Reduce dc offset through a manual system calibration process.

Measure the dc offset of every channel in the system and then

set a calibration value in Register 0x110 and Register 0x111.

Note that these registers are both chip and local registers, meaning

that they are accessed using the chip address and device index.

Bypass the dc offset calibration in Register 0x10F, Bits[2:0].

Multiband Antialiasing Filter and Decimate by 2

The multiband filter is a finite pulse response (FIR). It is program-

mable with low or high band filtering. The filter requires 11 input

samples to populate. The decimation rate is fixed at 2×. Therefore,

the decimation frequency is fDEC = fSAMPLE/2. Figure 50 and Figure 51

show the frequency response of the filter, depending on the mode.

Figure 50 shows the attenuation amplitude over the Nyquist

frequency range. Figure 51 shows the pass band response as

nearly flat.

–60

020

FREQUENCY (MHz)

–50

–40

–30

–20

–10

LOW BAND FILTER

HIGH BAND FILTER

Figure 50. Antialiasing Filter Frequency Response (Frequency Scale Assumes

fADC = 2 × fDEC = 40 MHz)

–8

020

FREQUENCY (MHz)

1012

141618

LOW BAND FILTER

HIGH BAND FILTER

–7

–6

–5

–4

–3

–2

–1

Figure 51. Antialiasing Filter Frequency Response (Frequency Scale Assumes

fADC = 2 × fDEC = 40 MHz)

AD9670EBZ Datasheet(PDF) 37 Page - Analog Devices

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