DAC5574 datasheet(9/30 Pages) TI

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−1

Time (2

µs/div)

VDD = 5 V

Powerup to Code 250

IDD − Current Consumption − µA

500

1000

1500

2000

400 420 440 460 480 500 520 540 560 580 600 620

VDD = 2.7 V

Time (25

µs/div)

VDD = 5 V

Output Loaded with

200 pF to GND

10% to 90% FSR

0.0

0.5

1.0

1.5

2.0

2.5

3.0

Time (25

µs/div)

VDD = 2.7 V

Output Loaded with

200 pF to GND

10% to 90% FSR

128

160

192

224

Digital Input Code

255

Channel A Output

Channel D Output

Channel B Output

Channel C Output

VDD = 5 V, TA = 25°C

−6

−2

128

160

192

224

255

Channel A Output

VDD = 2.7 V, TA = 25°C

Channel D Output

Channel C Output

Channel B Output

Digital Input Code

DAC5574

SLAS407 – DECEMBER 2003

TYPICAL CHARACTERISTICS (continued)

At T

A = +25°C, unless otherwise noted.

HISTOGRAM

EXITING

OF CURRENT CONSUMPTION

POWER-DOWN MODE

Figure 21.

Figure 22.

LARGE SIGNAL

SETTLING TIME

Figure 23.

Figure 24.

ABSOLUTE ERROR†

Figure 25.

Figure 26.

†Absolute error is the deviation from ideal DAC characteristics. It includes affects of offset, gain, and integral

linearity.

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