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MP8864 Datasheet(PDF) 16 Page - Monolithic Power Systems |
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MP8864 Datasheet(HTML) 16 Page - Monolithic Power Systems |
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16 / 29 page ![]() MP8864 – SYNCHRONOUS STEP-DOWN CONVERTER MP8864 Rev. 1.02 www.MonolithicPower.com 16 1/18/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. Output Over-Voltage Protection (OVP) The MP8864 monitors a resistor divider (VFB) to detect over voltage. When VFB becomes higher than 115% of the target voltage, the LS- FET remains on until the LS current drops to -2.5 A. This discharges the output and tries to keep it within normal range. The part exits this regulation period when VFB(10) drops below 105% of the reference voltage. Over-Current Protection and Hiccup (OCP) The MP8864 has cycle-by-cycle over-current limit control. When the inductor current peak value exceeds the set current-limit threshold, the HS-FET turns off and the LS-FET turns on and remains on until the inductor current falls below the internal valley current-limit threshold. The valley current-limit circuit decreases the operation frequency after the peak current-limit threshold is triggered. Meanwhile, the output voltage drops until VFB is below the under- voltage (UV) threshold (50% below the reference, typically). Once UV is triggered, the MP8864 enters hiccup mode to re-start the part periodically. This protection mode is especially useful when the output is dead-shorted to ground. The average short-circuit current is reduced greatly to alleviate thermal issues and to protect the regulator. The MP8864 exits hiccup mode once the over-current condition is removed. Thermal Shutdown (TSD) Thermal shutdown prevents the chip from operating at exceedingly high temperatures. If the die temperature exceeds 160°C, the entire chip shuts down. When the temperature is less than its lower threshold (140°C, typically) the chip is enabled again. Floating Driver and Bootstrap Charging An external bootstrap capacitor powers the floating power MOSFET driver. The floating driver has its own UVLO protection. The UVLO’s rising threshold is 2.2 V with a hysteresis of 150 mV. The bootstrap capacitor voltage is regulated internally by VIN through D1, M1, C4, L1, and COUT (see Figure 6). If VBST-VSW exceeds 5 V, U1 regulates M1 to maintain a 5 V BST voltage across C4. A 10 Ω resistor placed between SW and the BST capacitor is recommended to reduce SW spike voltage. out Figure 6 —Internal bootstrap charging circuit Start-Up and Shutdown If both VIN and EN exceed their respective thresholds, the chip starts up. The reference block starts first, generating stable reference voltage and currents, and then the internal regulator is enabled. The regulator provides a stable supply for the remaining circuitries. Three events can shut down the chip: EN low, VIN low, and thermal shutdown. During the shutdown, the signaling path is blocked first to avoid any fault triggering. The COMP voltage and the internal supply rail are then pulled down. The floating driver is not subject to this shutdown command. I2C Control and Default Output Voltage When the MP8864 is enabled (EN=high and VIN>UVLO), the chip starts up to an output voltage that is set by the FB feedback resistors with a programmed soft-start time; then the I2C bus can communicate with the master. If the chip does not receive the I2C communication signal continuously, it works efficiently through FB feedback and performs similar to traditional non-I2C parts. Once the I2C receives valid output reference voltage scaling instruction (if V_BOOT= “1”), the output voltage is determined by the resistor dividers R1, R2, and the VREF voltage. The VOUT value can be calculated using equation (2). The VREF default value is 0.6 V: ) R2 R1 (1 V V REF OUT (2) |
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