EM78P257AP datasheet(32/91 Pages) EMC

32 / 91 page

EM78P257

OTP ROM

This specification is subject to change without prior notice.

07.27.2004 (V1.4)

Table 5 Usage of Port 5 Input Status Changed Wake-up/Interrupt Function

Usage of Port 5 input status changed Wake-up/Interrupt

(I) Wake-up from Port 5 Input Status Change

(II) Port 5 Input Status Change Interrupt

(a) Before SLEEP

1. Read I/O Port 5 (MOV R5,R5)

1. Disable WDT

2. Execute "ENI"

2. Read I/O Port 5 (MOV R5,R5)

3. Enable interrupt (Set IOCF0.1)

3. Execute "ENI" or "DISI"

4. IF Port 5 change (interrupt)

4. Enable interrupt (Set IOCF0.1)

→ Interrupt vector (3FEH)

5. Execute "SLEP" instruction

(b) After Wake-up

1. IF "ENI"

→ Interrupt vector (3FEH)

2. IF "DISI"

→ Next instruction

4.5 RESET and Wake-up

1. RESET

A RESET is initiated by one of the following events-

(1) Power on reset;

(2) /RESET pin input "low", or

(3) Watch dog timer time-out (if enabled).

The device is kept in aRESET condition for a period of approximately 18ms

1 or 1ms2 (one oscillator start-up timer

period) after the reset is detected. The initial address is 000h.Once the RESET occurs, the following events are

performed.

• The oscillator is running, or will be started.

• The Program Counter (R2) is set to all "0".

• All I/O port pins are configured as input mode (high-impedance state).

• The Watchdog timer and prescaler are cleared.

• When power is switched on, the upper 3 bits of R3 are cleared.

• The bits of the CONT register are set to all "1" except for the Bit 6 (INT flag).

• The bits of the IOCB0 register are set to all "1".

• The IOCC0 register is cleared.

• The bits of the IOCD0 register are set to all "1".

1 NOTE:

VDD=5V, Setup time period = 15.4ms ± 30%.

VDD=3V, Setup time period = 17.6ms ± 30%.

2 NOTE:

VDD=5V, Setup time period = 1.07ms ± 30%.

VDD=3V, Setup time period = 1.22ms ± 30%.

EM78P257AP Datasheet(PDF) 32 Page - ELAN Microelectronics Corp

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