EM78P257AP datasheet(9/91 Pages) EMC

9 / 91 page

EM78P257

OTP ROM

This specification is subject to change without prior notice.

07.27.2004 (V1.4)

* RC type: clock output with a duration of one instruction cycle.

* External clock signal input.

P70,P71

16,5

I/O

* General purpose I/O pin. (P71 is input pin only)

* Default value after a power on reset.

P60~P67

7~14

I/O

* General purpose I/O pin.

* Open_drain.

* Default value after a power on reset.

P50~P57

1~4

17~20

I/O

* General purpose I/O pin.

* Pull_high/pull_down.

* Wake up from sleep mode when the status of the pin changes.

* Default value after a power on reset.

IR OUT

* IR mode output pin, capable of sinking 20mA

/INT

* External interrupt pin triggered by falling edge.

CIN1-, CIN1+

CIN2-, CIN2+

CIN3-, CIN3+

CIN4-, CIN4+

CO1,CO2

CO3,CO4

17,18

4,3

8,9

13,12

19,2

10,11

* “-“ -> the input pin of Vin- of a comparator.

* “+”-> the input pin of Vin+ of a comparator.

* Pin CO1~4 are the outputs of the comparators.

TCC

TCC1,TCC2

TCC3,TCC4

TCC5,TCC6

8,13

19,18

1,20

External Counter input.

/RESET

* If set as /RESET and remains at logic low, the device will be reset.

* Voltage on /RESET/Vpp must not exceed Vdd during the normal

mode.

* Pull_high is on if defined as /RESET.

VSS

Ground.

EM78P257AP Datasheet(PDF) 9 Page - ELAN Microelectronics Corp

EM78P257AP Datasheet(HTML) 9 Page - ELAN Microelectronics Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91

Datasheet Download

Link URL