EM78P257AP datasheet(64/91 Pages) EMC

64 / 91 page

EM78P257

OTP ROM

This specification is subject to change without prior notice.

07.27.2004 (V1.4)

1: Enable IRE. Ignored RB(Bit4(TCCBTE); Bit5(TCCBTS)), and TCCBX set as decrement counter.

Enable H/W Modulator Function.

• Bit 2(HF) High Frequency. When HF = 1; the Low-time part of the generated pulse is modulated with

Frequency Fosco.

• Bit 1(LGP) Long Pulse. When LGP = 1; the contents of the High-time register are ignored. A single

pulse is generated. Its pulse is determined as shown below.

Pulse width = (Contents of Low-time register) x (number of pulse) x (1/Fosco)

If HF = 1; this pulse is modulated with Frequency Fosco (selected by M1,M0).

• Bit 0(PWM) Pulse Width Modulation. When PWM = 1 and LGP = 0, the LSB Counter & MSB Counter

are disabled, a continuous pulse train is generated, and the output signal is actually a PWM

waveform format of PWM.

5. IR mode timing

Number of pulses = 2

IR OUT

CASE 2

Low-time Register = 3

start

Fosc

Fosco

IR OUT

CASE 1

Software time

Interrupt to CPU

High-time Register = 2

Fig. 28 CASE 1shows a typical pulse train(DP=00;MF=10;HF=0;LGP=0;PWM=0); CASE 2 shows

the sa me pulse train after being modulated with a frequency of 1/4Fosc

(DP=00 ;MF=10 ;HF=1;LGP=0;PWM=0).

EM78P257AP Datasheet(PDF) 64 Page - ELAN Microelectronics Corp