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EM78P257AP Datasheet(PDF) 62 Page - ELAN Microelectronics Corp |
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EM78P257AP Datasheet(HTML) 62 Page - ELAN Microelectronics Corp |
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62 / 91 page ![]() EM78P257 OTP ROM This specification is subject to change without prior notice. 07.27.2004 (V1.4) 62 want to be restarted , we must disable IR in advance and then enable IR again.The time delay between two pulse trains is determined by software. 3. Pin Description SYMBOL PIN DESCRIPTION P60 to P66 7~13 Standard I/O Port lines, generally used for keypad scanning P50 to P57 1~4,17~20 Standard I/O Port lines, generally used for keypad sensing P67(IR OUT) 14 Pulse train output pin, capable of sinking 30mA OSCO 16 External clock signal input OSCI 17 External clock signal input Vdd 15 Power supply Vss 6 Ground 4. Programmed the Related Registers When defining IR mode is defined, refer to the related register of its operation as shown in the Table 27 and Table 28 below. Table 27 Related Control Registers of the IR Mode Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit1 Bit 0 0x0B TCR(2)/RB 0 TCCBIE/0 TCCBTS/0 TCCBTE/0 0 TCCCIE/0 TCCCTS/0 TCCCTE/0 0x08 TCCCR/IOC80 TCC2E TCC4E TCC6E TCCBE - - - - 0x0D IRCR/RD DP1/0 DP0/0 MF1/0 MF0/0 IRE/0 HF/0 LGP/0 PWM/0 <Note> *Bit name/initial value Table 28 Related status/data register of the IR mode Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit1 Bit 0 0x06 TCCBL/IOC61 TCCBL7 TCCBL6 TCCBL5 TCCBL4 TCCBL3 TCCBL2 TCCBL1 TCCBL0 0x07 TCCBH/IOC71 TCCBH7 TCCBH6 TCCBH5 TCCBH4 TCCBH3 TCCBH2 TCCBH1 TCCBH0 0x09 LTR/IOC91 LTR7 LTR6 LTR5 LTR4 LTR3 LTR2 LTR1 LTR0 0x0A HTR/IOCA1 HTR7 HTR6 HTR5 HTR4 HTR3 HTR2 HTR1 HTR0 0X0B PTR/IOCB1 PTR7 PTR6 PTR5 PTR4 PTR3 PTR2 PTR1 PTR0 • TCCBL : An eight-bit clock counter is for the least significant byte of TCCBX. TCCBL, which can be read, written, and cleared at any reset condition. • TCCBH : An eight-bit clock counter is for the most significant byte of TCCBX. TCCBH, which can be read, written, and cleared at any reset condition. • Low-time Register :The 8-bit Low-time register that controls the active or Low period of the pulse. The High-time register controls the inactive or High period of the cycle. • The decimal value of its contents determines the number of oscillator cycles indicating that the IR OUT pin is active. The active period of IR OUT can be calculated as follow: tLow=(decimal value held in Low-time register)/fosco • High-time Register :The 8-bit High-time register control the inactive or High period of the pulse. |
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